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Searched refs:BasePtr (Results 1 – 25 of 36) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp67 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
72 BasePtr = X86::ESI; in X86RegisterInfo()
533 for (MCSubRegIterator I(BasePtr, this, /*IncludeSelf=*/true); in getReservedRegs()
640 return MRI->canReserveReg(BasePtr); in canRealignStack()
665 unsigned BasePtr = MI.getOperand(1).getReg(); in tryOptimizeLEAtoMOV() local
670 BasePtr = getX86SubSuperRegister(BasePtr, 32); in tryOptimizeLEAtoMOV()
691 unsigned BasePtr; in eliminateFrameIndex() local
717 unsigned MachineBasePtr = BasePtr; in eliminateFrameIndex()
718 if (Opc == X86::LEA64_32r && X86::GR32RegClass.contains(BasePtr)) in eliminateFrameIndex()
719 MachineBasePtr = getX86SubSuperRegister(BasePtr, 64); in eliminateFrameIndex()
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H A DX86RegisterInfo.h50 unsigned BasePtr; variable
135 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
H A DX86FrameLowering.cpp992 unsigned BasePtr = TRI->getBaseRegister(); in emitPrologue() local
1443 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr) in emitPrologue()
1465 assert(UsedReg == BasePtr); in emitPrologue()
2186 unsigned BasePtr = TRI->getBaseRegister(); in determineCalleeSaves() local
2188 BasePtr = getX86SubSuperRegister(BasePtr, 64); in determineCalleeSaves()
2189 SavedRegs.set(BasePtr); in determineCalleeSaves()
2899 unsigned BasePtr = TRI->getBaseRegister(); in restoreWin32EHStackPointers() local
2932 } else if (UsedReg == BasePtr) { in restoreWin32EHStackPointers()
2934 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr), in restoreWin32EHStackPointers()
2941 assert(UsedReg == BasePtr); in restoreWin32EHStackPointers()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCLoopPreIncPrep.cpp145 static bool IsPtrInBounds(Value *BasePtr) { in IsPtrInBounds() argument
146 Value *StrippedBasePtr = BasePtr; in IsPtrInBounds()
404 Value *BasePtr = GetPointerOperand(MemI); in runOnLoop() local
405 assert(BasePtr && "No pointer operand"); in runOnLoop()
409 BasePtr->getType()->getPointerAddressSpace()); in runOnLoop()
450 PtrInc->setIsInBounds(IsPtrInBounds(BasePtr)); in runOnLoop()
460 if (PtrInc->getType() != BasePtr->getType()) in runOnLoop()
461 NewBasePtr = new BitCastInst(PtrInc, BasePtr->getType(), in runOnLoop()
466 if (Instruction *IDel = dyn_cast<Instruction>(BasePtr)) in runOnLoop()
468 BasePtr->replaceAllUsesWith(NewBasePtr); in runOnLoop()
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H A DPPCISelLowering.cpp6849 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() local
6874 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE() local
9293 SDValue BasePtr = LN->getBasePtr(); in LowerVectorLoad() local
9313 BasePtr, in LowerVectorLoad()
9333 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, in LowerVectorLoad()
9359 Idx = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, Idx); in LowerVectorLoad()
9381 SDValue BasePtr = SN->getBasePtr(); in LowerVectorStore() local
9422 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, in LowerVectorStore()
9489 Idx = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, Idx); in LowerVectorStore()
12859 BasePtr = in PerformDAGCombine()
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/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp190 unsigned BasePtr; in eliminateFrameIndex() local
191 int64_t Offset = (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr) + in eliminateFrameIndex()
196 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false); in eliminateFrameIndex()
211 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
234 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
242 .addReg(BasePtr).addImm(HighOffset).addReg(0); in eliminateFrameIndex()
248 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr); in eliminateFrameIndex()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DShadowStackGCLowering.cpp79 Type *Ty, Value *BasePtr, int Idx1,
82 Type *Ty, Value *BasePtr, int Idx1, int Idx2,
258 Value *BasePtr, int Idx, in CreateGEP() argument
264 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
272 IRBuilder<> &B, Type *Ty, Value *BasePtr, in CreateGEP() argument
276 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
H A DInterleavedLoadCombinePass.cpp870 Value *BasePtr; in computeFromLI() local
880 computePolynomialFromPointer(*LI->getPointerOperand(), Offset, BasePtr, DL); in computeFromLI()
883 Result.PV = BasePtr; in computeFromLI()
957 Value *&BasePtr, in computePolynomialFromPointer()
963 BasePtr = nullptr; in computePolynomialFromPointer()
973 computePolynomialFromPointer(*CI.getOperand(0), Result, BasePtr, DL); in computePolynomialFromPointer()
976 BasePtr = &Ptr; in computePolynomialFromPointer()
990 BasePtr = GEP.getPointerOperand(); in computePolynomialFromPointer()
1008 BasePtr = nullptr; in computePolynomialFromPointer()
1025 BasePtr = GEP.getPointerOperand(); in computePolynomialFromPointer()
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H A DMachineOperand.cpp948 const Value *BasePtr = V.get<const Value *>(); in isDereferenceable() local
949 if (BasePtr == nullptr) in isDereferenceable()
953 BasePtr, 1, APInt(DL.getPointerSizeInBits(), Offset + Size), DL); in isDereferenceable()
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp328 SDValue BasePtr = ST->getBasePtr(); in select() local
331 if (isa<FrameIndexSDNode>(BasePtr) || isa<ConstantSDNode>(BasePtr) || in select()
332 BasePtr.isUndef()) { in select()
336 const RegisterSDNode *RN = dyn_cast<RegisterSDNode>(BasePtr.getOperand(0)); in select()
342 int CST = (int)cast<ConstantSDNode>(BasePtr.getOperand(1))->getZExtValue(); in select()
347 SDValue Ops[] = {BasePtr.getOperand(0), Offset, ST->getValue(), Chain}; in select()
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP); in eliminateFrameIndex() local
137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFrameLowering.cpp186 unsigned BasePtr = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
187 FI->setBasePointerVreg(BasePtr); in emitPrologue()
188 BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::COPY), BasePtr) in emitPrologue()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h103 unsigned BasePtr = ARM::R6;
178 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
H A DARMBaseRegisterInfo.cpp192 markSuperRegs(Reserved, BasePtr); in getReservedRegs()
416 return MRI->canReserveReg(BasePtr); in canRealignStack()
H A DThumb1FrameLowering.cpp132 unsigned BasePtr = RegInfo->getBaseRegister(); in emitPrologue() local
391 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr) in emitPrologue()
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp430 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() local
436 if (DAG.isBaseWithConstantOffset(BasePtr) && in LowerLOAD()
437 isWordAligned(BasePtr->getOperand(0), DAG)) { in LowerLOAD()
438 SDValue NewBasePtr = BasePtr->getOperand(0); in LowerLOAD()
443 if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) && in LowerLOAD()
454 DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, BasePtr, in LowerLOAD()
457 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in LowerLOAD()
478 Entry.Node = BasePtr; in LowerLOAD()
511 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE() local
520 Chain, dl, Low, BasePtr, ST->getPointerInfo(), MVT::i16, in LowerSTORE()
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/freebsd-12.1/contrib/llvm/lib/DebugInfo/CodeView/
H A DSymbolRecordMapping.cpp494 case EncodedFramePtrReg::BasePtr: return RegisterId::EBX; in decodeFramePtrReg()
502 case EncodedFramePtrReg::BasePtr: return RegisterId::R13; in decodeFramePtrReg()
528 return EncodedFramePtrReg::BasePtr; in encodeFramePtrReg()
540 return EncodedFramePtrReg::BasePtr; in encodeFramePtrReg()
/freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/
H A DLoopIdiomRecognize.cpp898 Value *BasePtr = in processLoopStridedStore() local
900 if (mayLoopAccessLocation(BasePtr, ModRefInfo::ModRef, CurLoop, BECount, in processLoopStridedStore()
904 RecursivelyDeleteTriviallyDeadInstructions(BasePtr, TLI); in processLoopStridedStore()
927 Builder.CreateMemSet(BasePtr, SplatValue, NumBytes, StoreAlignment); in processLoopStridedStore()
947 NewCall = Builder.CreateCall(MSP, {BasePtr, PatternPtr, NumBytes}); in processLoopStridedStore()
H A DSROA.cpp1372 static Value *buildGEP(IRBuilderTy &IRB, Value *BasePtr, in buildGEP() argument
1375 return BasePtr; in buildGEP()
1380 return BasePtr; in buildGEP()
1382 return IRB.CreateInBoundsGEP(nullptr, BasePtr, Indices, in buildGEP()
1396 Value *BasePtr, Type *Ty, Type *TargetTy, in getNaturalGEPWithType() argument
1400 return buildGEP(IRB, BasePtr, Indices, NamePrefix); in getNaturalGEPWithType()
1403 unsigned OffsetSize = DL.getIndexTypeSizeInBits(BasePtr->getType()); in getNaturalGEPWithType()
1432 return buildGEP(IRB, BasePtr, Indices, NamePrefix); in getNaturalGEPWithType()
3786 Instruction *BasePtr = cast<Instruction>(LI->getPointerOperand()); in presplitLoadsAndStores() local
3798 getAdjustedPtr(IRB, DL, BasePtr, in presplitLoadsAndStores()
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/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp4176 SDValue BasePtr = LD->getBasePtr(); in GenWidenVectorLoads() local
4223 BasePtr = DAG.getObjectPtrOffset(dl, BasePtr, Increment); in GenWidenVectorLoads()
4230 L = DAG.getLoad(NewVT, dl, Chain, BasePtr, in GenWidenVectorLoads()
4248 L = DAG.getLoad(NewVT, dl, Chain, BasePtr, in GenWidenVectorLoads()
4326 SDValue BasePtr = LD->getBasePtr(); in GenWidenVectorExtLoads() local
4345 SDValue NewBasePtr = DAG.getObjectPtrOffset(dl, BasePtr, Offset); in GenWidenVectorExtLoads()
4366 SDValue BasePtr = ST->getBasePtr(); in GenWidenVectorStores() local
4401 BasePtr = DAG.getObjectPtrOffset(dl, BasePtr, Increment); in GenWidenVectorStores()
4420 BasePtr = DAG.getObjectPtrOffset(dl, BasePtr, Increment); in GenWidenVectorStores()
4434 SDValue BasePtr = ST->getBasePtr(); in GenWidenVectorTruncStores() local
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H A DDAGCombiner.cpp8361 BasePtr = DAG.getNode(ISD::ADD, DL, BasePtr.getValueType(), BasePtr, in CombineExtLoad()
12621 SDValue BasePtr; in CombineToPreIndexedLoadStore() local
12632 std::swap(BasePtr, Offset); in CombineToPreIndexedLoadStore()
12650 if (isa<FrameIndexSDNode>(BasePtr) || isa<RegisterSDNode>(BasePtr)) in CombineToPreIndexedLoadStore()
12656 if (Val == BasePtr || BasePtr.getNode()->isPredecessorOf(Val.getNode())) in CombineToPreIndexedLoadStore()
12704 std::swap(BasePtr, Offset); in CombineToPreIndexedLoadStore()
12747 std::swap(BasePtr, Offset); in CombineToPreIndexedLoadStore()
12847 SDValue BasePtr; in CombineToPostIndexedLoadStore() local
12862 if (isa<FrameIndexSDNode>(BasePtr) || isa<RegisterSDNode>(BasePtr)) in CombineToPostIndexedLoadStore()
14355 if (BasePtr.getBase().isUndef()) in getStoreMergeCandidates()
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/freebsd-12.1/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp1768 SDValue BasePtr = ST->getBasePtr(); in tryStore() local
1775 if (SelectDirectAddr(BasePtr, Addr)) { in tryStore()
1792 ? SelectADDRsi64(BasePtr.getNode(), BasePtr, Base, Offset) in tryStore()
1793 : SelectADDRsi(BasePtr.getNode(), BasePtr, Base, Offset)) { in tryStore()
1811 ? SelectADDRri64(BasePtr.getNode(), BasePtr, Base, Offset) in tryStore()
1812 : SelectADDRri(BasePtr.getNode(), BasePtr, Base, Offset)) { in tryStore()
1856 BasePtr, in tryStore()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp2234 SDValue BasePtr = cast<MemSDNode>(N)->getBasePtr(); in rebalanceAddressTrees() local
2235 if (BasePtr.getOpcode() != ISD::ADD) in rebalanceAddressTrees()
2239 if (RootWeights.count(BasePtr.getNode())) in rebalanceAddressTrees()
2248 Worklist.push_back(BasePtr.getOperand(0).getNode()); in rebalanceAddressTrees()
2249 Worklist.push_back(BasePtr.getOperand(1).getNode()); in rebalanceAddressTrees()
2273 RootWeights[BasePtr.getNode()] = -1; in rebalanceAddressTrees()
2274 SDValue NewBasePtr = balanceSubTree(BasePtr.getNode(), /*TopLevel=*/ true); in rebalanceAddressTrees()
/freebsd-12.1/contrib/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeView.h523 BasePtr = 3, enumerator
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1161 SDValue BasePtr = Store->getBasePtr(); in lowerPrivateTruncStore() local
1165 SDValue LoadPtr = BasePtr; in lowerPrivateTruncStore()
1167 LoadPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, Offset); in lowerPrivateTruncStore()
1389 SDValue BasePtr = Load->getBasePtr(); in lowerPrivateExtLoad() local
1393 SDValue LoadPtr = BasePtr; in lowerPrivateExtLoad()
1395 LoadPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, Offset); in lowerPrivateExtLoad()

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