Lines Matching refs:BasePtr
67 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
72 BasePtr = X86::ESI; in X86RegisterInfo()
532 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs() local
533 for (MCSubRegIterator I(BasePtr, this, /*IncludeSelf=*/true); in getReservedRegs()
640 return MRI->canReserveReg(BasePtr); in canRealignStack()
665 unsigned BasePtr = MI.getOperand(1).getReg(); in tryOptimizeLEAtoMOV() local
670 BasePtr = getX86SubSuperRegister(BasePtr, 32); in tryOptimizeLEAtoMOV()
674 TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr, in tryOptimizeLEAtoMOV()
691 unsigned BasePtr; in eliminateFrameIndex() local
696 FIOffset = TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0); in eliminateFrameIndex()
698 FIOffset = TFI->getFrameIndexReference(MF, FrameIndex, BasePtr); in eliminateFrameIndex()
717 unsigned MachineBasePtr = BasePtr; in eliminateFrameIndex()
718 if (Opc == X86::LEA64_32r && X86::GR32RegClass.contains(BasePtr)) in eliminateFrameIndex()
719 MachineBasePtr = getX86SubSuperRegister(BasePtr, 64); in eliminateFrameIndex()
725 if (BasePtr == StackPtr) in eliminateFrameIndex()
731 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex()