Searched refs:BaseOp2 (Results 1 – 6 of 6) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 118 bool shouldClusterMemOps(MachineOperand &BaseOp1, MachineOperand &BaseOp2,
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| H A D | AArch64InstrInfo.cpp | 2185 MachineOperand &BaseOp2, in shouldClusterMemOps() argument
2188 MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
2189 if (BaseOp1.getType() != BaseOp2.getType()) in shouldClusterMemOps()
2196 if (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg()) in shouldClusterMemOps()
2234 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 >= Offset2) && in shouldClusterMemOps()
2240 BaseOp2.getIndex(), Offset2, SecondOpc); in shouldClusterMemOps()
2243 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1168 MachineOperand &BaseOp2, in shouldClusterMemOps() argument
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 384 const MachineOperand &BaseOp2) { in memOpsHaveSameBasePtr() argument
387 if (!BaseOp1.isReg() || !BaseOp2.isReg()) in memOpsHaveSameBasePtr()
390 if (BaseOp1.isIdenticalTo(BaseOp2)) in memOpsHaveSameBasePtr()
417 MachineOperand &BaseOp2, in shouldClusterMemOps() argument
420 MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
422 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOp1, SecondLdSt, BaseOp2)) in shouldClusterMemOps()
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| H A D | SIInstrInfo.h | 180 bool shouldClusterMemOps(MachineOperand &BaseOp1, MachineOperand &BaseOp2,
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | MachinePipeliner.cpp | 534 MachineOperand *BaseOp1, *BaseOp2; in addLoopCarriedDependences() local
537 TII->getMemOperandWithOffset(MI, BaseOp2, Offset2, TRI)) { in addLoopCarriedDependences()
538 if (BaseOp1->isIdenticalTo(*BaseOp2) && in addLoopCarriedDependences()
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