Searched refs:AssignedReg (Results 1 – 4 of 4) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 622 unsigned AssignedReg = FuncInfo.ValueMap[I]; in SelectLoad() local
624 AssignedReg ? MRI.getRegClass(AssignedReg) : nullptr; in SelectLoad()
1180 unsigned AssignedReg = FuncInfo.ValueMap[I]; in PPCMoveToIntReg() local
1182 AssignedReg ? MRI.getRegClass(AssignedReg) : nullptr; in PPCMoveToIntReg()
1281 unsigned AssignedReg = FuncInfo.ValueMap[I]; in SelectBinaryIntOp() local
1283 (AssignedReg ? MRI.getRegClass(AssignedReg) : in SelectBinaryIntOp()
1934 unsigned AssignedReg = FuncInfo.ValueMap[I]; in SelectIntExt() local
1936 (AssignedReg ? MRI.getRegClass(AssignedReg) : in SelectIntExt()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | RegAllocFast.cpp | 216 MCPhysReg AssignedReg, bool Kill);
257 MCPhysReg AssignedReg, bool Kill) { in spill() argument
259 << " in " << printReg(AssignedReg, TRI)); in spill()
264 TII->storeRegToStackSlot(*MBB, Before, AssignedReg, Kill, FI, &RC, TRI); in spill()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 493 unsigned &AssignedReg = FuncInfo.ValueMap[I]; in updateValueMap() local
494 if (AssignedReg == 0) in updateValueMap()
496 AssignedReg = Reg; in updateValueMap()
497 else if (Reg != AssignedReg) { in updateValueMap()
500 FuncInfo.RegFixups[AssignedReg + i] = Reg + i; in updateValueMap()
504 AssignedReg = Reg; in updateValueMap()
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| H A D | SelectionDAGBuilder.cpp | 7360 unsigned AssignedReg; in GetRegistersForValue() local
7362 std::tie(AssignedReg, RC) = TLI.getRegForInlineAsmConstraint( in GetRegistersForValue()
7433 if (AssignedReg) { in GetRegistersForValue()
7434 for (; *I != AssignedReg; ++I) in GetRegistersForValue()
7440 auto R = (AssignedReg) ? *I : RegInfo.createVirtualRegister(RC); in GetRegistersForValue()
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