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Searched refs:ArgFlags (Results 1 – 25 of 27) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86CallingConv.cpp120 if (ArgFlags.isSecArgPass()) { in CC_X86_64_VectorCall()
121 if (ArgFlags.isHva()) in CC_X86_64_VectorCall()
123 ArgFlags, State); in CC_X86_64_VectorCall()
143 if (!ArgFlags.isHva() || ArgFlags.isHvaStart()) { in CC_X86_64_VectorCall()
156 if (!ArgFlags.isHva()) { in CC_X86_64_VectorCall()
165 return ArgFlags.isHva(); in CC_X86_64_VectorCall()
172 if (ArgFlags.isSecArgPass()) { in CC_X86_32_VectorCall()
173 if (ArgFlags.isHva()) in CC_X86_32_VectorCall()
175 ArgFlags, State); in CC_X86_32_VectorCall()
187 if (ArgFlags.isHva()) in CC_X86_32_VectorCall()
[all …]
H A DX86CallingConv.h30 ISD::ArgFlagsTy &ArgFlags, CCState &State);
40 ISD::ArgFlagsTy &ArgFlags, CCState &State);
49 ISD::ArgFlagsTy &ArgFlags, CCState &State);
63 ISD::ArgFlagsTy &ArgFlags, in CC_X86_32_MCUInReg() argument
76 if (ArgFlags.isSplit() || !PendingMembers.empty()) { in CC_X86_32_MCUInReg()
79 if (!ArgFlags.isSplitEnd()) in CC_X86_32_MCUInReg()
93 assert(ArgFlags.isSplitEnd()); in CC_X86_32_MCUInReg()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DCallingConvLower.cpp48 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
49 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
50 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
93 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
94 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeFormalArguments()
111 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
112 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
125 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
126 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeReturn()
143 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.h45 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, in finishStackBlock() argument
50 unsigned Align = std::min(ArgFlags.getOrigAlign(), StackAlign); in finishStackBlock()
67 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Stack_Block() argument
75 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Stack_Block()
78 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, 8); in CC_AArch64_Custom_Stack_Block()
86 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_AArch64_Custom_Block() argument
112 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_AArch64_Custom_Block()
134 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, SlotAlign); in CC_AArch64_Custom_Block()
H A DAArch64CallingConvention.td16 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMCallingConv.h60 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_APCS_Custom_f64() argument
114 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
146 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
157 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
159 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
182 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_Aggregate() argument
195 ArgFlags.getOrigAlign())); in CC_ARM_AAPCS_Custom_Aggregate()
197 if (!ArgFlags.isInConsecutiveRegsLast()) in CC_ARM_AAPCS_Custom_Aggregate()
H A DARMFastISel.cpp225 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1899 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1906 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs()
2237 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
2241 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
2257 ArgFlags.push_back(Flags); in ARMEmitLibcall()
2263 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2346 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
2351 ArgFlags.reserve(arg_size); in SelectCall()
2391 ArgFlags.push_back(Flags); in SelectCall()
[all …]
H A DARMCallingConv.td14 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
133 CCIfType<[i32], CCIf<"ArgFlags.getOrigAlign() != 8",
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetCallingConv.td42 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
47 class CCIfSwiftSelf<CCAction A> : CCIf<"ArgFlags.isSwiftSelf()", A> {
52 class CCIfSwiftError<CCAction A> : CCIf<"ArgFlags.isSwiftError()", A> {
57 class CCIfConsecutiveRegs<CCAction A> : CCIf<"ArgFlags.isInConsecutiveRegs()", A> {
66 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
70 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
74 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
78 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h91 ISD::ArgFlagsTy &ArgFlags, in CC_SystemZ_I128Indirect() argument
97 if (!ArgFlags.isSplit() && PendingMembers.empty()) in CC_SystemZ_I128Indirect()
105 if (!ArgFlags.isSplitEnd()) in CC_SystemZ_I128Indirect()
H A DSystemZCallingConv.td13 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/Basic/
H A DIdentifierTable.h684 ArgFlags = 0x07 enumerator
695 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
702 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
708 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); in getAsIdentifierInfo()
713 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); in getMultiKeywordSelector()
717 return InfoPtr & ArgFlags; in getIdentifierInfoFlag()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp826 if (!IsFixed && ArgFlags.getOrigAlign() == TwoXLenInBytes && in CC_RISCV()
843 assert(!ArgFlags.isSplit() && PendingLocs.empty() && in CC_RISCV()
865 if (ArgFlags.isSplit() || !PendingLocs.empty()) { in CC_RISCV()
870 PendingArgFlags.push_back(ArgFlags); in CC_RISCV()
871 if (!ArgFlags.isSplitEnd()) { in CC_RISCV()
878 if (ArgFlags.isSplitEnd() && PendingLocs.size() <= 2) { in CC_RISCV()
887 ArgFlags); in CC_RISCV()
935 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in analyzeInputArgs() local
944 ArgFlags, CCInfo, /*IsRet=*/true, IsRet, ArgTy)) { in analyzeInputArgs()
960 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in analyzeOutputArgs() local
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallingConv.td15 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
17 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
H A DAMDGPUISelLowering.cpp46 ISD::ArgFlagsTy ArgFlags, CCState &State, in allocateCCRegs() argument
60 ISD::ArgFlagsTy ArgFlags, CCState &State) { in allocateSGPRTuple() argument
69 return allocateCCRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, in allocateSGPRTuple()
83 ISD::ArgFlagsTy ArgFlags, CCState &State) { in allocateVGPRTuple() argument
91 return allocateCCRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, in allocateVGPRTuple()
98 return allocateCCRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, in allocateVGPRTuple()
103 return allocateCCRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, in allocateVGPRTuple()
109 return allocateCCRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, in allocateVGPRTuple()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h178 ISD::ArgFlagsTy ArgFlags, CCState &State);
185 ISD::ArgFlagsTy &ArgFlags, CCState &State);
460 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h1174 ISD::ArgFlagsTy &ArgFlags,
1180 ISD::ArgFlagsTy &ArgFlags,
1187 ISD::ArgFlagsTy &ArgFlags,
1193 ISD::ArgFlagsTy &ArgFlags,
H A DPPCFastISel.cpp184 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1378 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() argument
1390 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); in processCallArgs()
1609 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in fastLowerCall() local
1614 ArgFlags.reserve(NumArgs); in fastLowerCall()
1640 ArgFlags.push_back(Flags); in fastLowerCall()
1647 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in fastLowerCall()
H A DPPCISelLowering.cpp3160 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() argument
3168 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
3196 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() argument
3221 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
5383 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in LowerCall_32SVR4() local
5387 Result = CC_PPC32_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, in LowerCall_32SVR4()
5391 ArgFlags, CCInfo); in LowerCall_32SVR4()
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp482 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments() local
489 if (ArgFlags.isSExt()) in AnalyzeArguments()
491 else if (ArgFlags.isZExt()) in AnalyzeArguments()
498 if (ArgFlags.isByVal()) { in AnalyzeArguments()
499 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags); in AnalyzeArguments()
517 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
527 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonCallingConv.td62 // without any additional information (in ArgFlags) stating that
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2672 if (ArgFlags.isByVal()) in CC_MipsO32()
2676 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32()
2679 if (ArgFlags.isSExt()) in CC_MipsO32()
2681 else if (ArgFlags.isZExt()) in CC_MipsO32()
2691 if (ArgFlags.isSExt()) in CC_MipsO32()
2693 else if (ArgFlags.isZExt()) in CC_MipsO32()
2706 unsigned OrigAlign = ArgFlags.getOrigAlign(); in CC_MipsO32()
2716 if (ArgFlags.isSplit()) { in CC_MipsO32()
2770 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
2773 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); in CC_MipsO32_FP32()
[all …]
H A DMipsFastISel.cpp276 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
281 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
287 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64() argument
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp371 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Lanai32_VarArg() argument
376 return CC_Lanai32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Lanai32_VarArg()
382 if (ArgFlags.isSExt()) in CC_Lanai32_VarArg()
384 else if (ArgFlags.isZExt()) in CC_Lanai32_VarArg()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp43 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() argument
45 assert (ArgFlags.isSRet()); in CC_Sparc_Assign_SRet()
56 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Split_64() argument
84 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_Ret_Split_64() argument
108 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full() argument
153 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half() argument

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