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Searched refs:AddrBaseReg (Results 1 – 14 of 14) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InsertPrefetch.cpp83 unsigned BaseReg = MI.getOperand(Op + X86::AddrBaseReg).getReg(); in IsMemOpCompatibleWithPrefetch()
218 assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 && in runOnMachineFunction()
226 MIB.addReg(Current->getOperand(MemOpOffset + X86::AddrBaseReg).getReg()) in runOnMachineFunction()
H A DX86OptimizeLEAs.cpp192 return MemOpKey(&MI.getOperand(N + X86::AddrBaseReg), in getMemOpKey()
357 if (TII->getRegClass(Desc, MemOpNo + X86::AddrBaseReg, TRI, *MF) != in chooseBestLEA()
451 if (!isIdenticalOp(MI.getOperand(MemOpNo + X86::AddrBaseReg), MO)) in isReplaceable()
457 if (i != (unsigned)(MemOpNo + X86::AddrBaseReg) && in isReplaceable()
551 MI.getOperand(MemOpNo + X86::AddrBaseReg) in removeRedundantAddrCalc()
H A DX86FixupLEAs.cpp343 unsigned SrcReg = LEA.getOperand(1 + X86::AddrBaseReg).getReg(); in isLEASimpleIncOrDec()
379 .add(MI.getOperand(1 + X86::AddrBaseReg)); in fixupIncDec()
395 MachineOperand &p = MI.getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()
433 const MachineOperand &Base = MI.getOperand(1 + X86::AddrBaseReg); in processInstructionForSlowLEA()
485 const MachineOperand &Base = MI.getOperand(1 + X86::AddrBaseReg); in processInstrForSlow3OpLEA()
H A DX86AsmPrinter.cpp263 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference()
299 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier); in printLeaMemReference()
328 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference()
344 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant); in printIntelMemReference()
H A DX86CallFrameOptimization.cpp421 if (!I->getOperand(X86::AddrBaseReg).isReg() || in collectCallInfo()
422 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
H A DX86InstrInfo.h152 MI.getOperand(Op + X86::AddrBaseReg).isReg() && in isLeaMem()
H A DX86SpeculativeLoadHardening.cpp1715 MI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in tracePredStateThroughBlocksAndHarden()
1788 MI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in tracePredStateThroughBlocksAndHarden()
2178 UseMI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in sinkPostLoadHardenedInst()
H A DX86AvoidStoreForwardingBlocks.cpp301 return MI->getOperand(AddrOffset + X86::AddrBaseReg); in getBaseOperand()
H A DX86InstrInfo.cpp196 if (MI.getOperand(Op + X86::AddrBaseReg).isFI() && in isFrameOperand()
203 FrameIndex = MI.getOperand(Op + X86::AddrBaseReg).getIndex(); in isFrameOperand()
549 if (MI.getOperand(1 + X86::AddrBaseReg).isReg() && in isReallyTriviallyReMaterializable()
554 unsigned BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
574 if (!MI.getOperand(1 + X86::AddrBaseReg).isReg()) in isReallyTriviallyReMaterializable()
576 unsigned BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
3231 BaseOp = &MemOp.getOperand(MemRefBegin + X86::AddrBaseReg); in getMemOperandWithOffset()
5822 if (!HasSameOp(X86::AddrBaseReg) || !HasSameOp(X86::AddrScaleAmt) || in areLoadsFromSameBasePtr()
H A DX86MCInstLower.cpp358 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
382 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
/freebsd-12.1/contrib/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp68 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()
210 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
231 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()
384 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in emitMemModRMByte()
750 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
795 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
810 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
826 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
1068 REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
1078 REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
[all …]
H A DX86BaseInfo.h33 AddrBaseReg = 0, enumerator
/freebsd-12.1/contrib/llvm/lib/Target/X86/InstPrinter/
H A DX86IntelInstPrinter.cpp74 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference()
86 printOperand(MI, Op+X86::AddrBaseReg, O); in printMemReference()
H A DX86ATTInstPrinter.cpp113 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference()
134 printOperand(MI, Op + X86::AddrBaseReg, O); in printMemReference()