Lines Matching refs:AddrBaseReg

68     const MCOperand &BaseReg  = MI.getOperand(Op+X86::AddrBaseReg);  in Is16BitMemOperand()
210   const MCOperand &BaseReg  = MI.getOperand(Op+X86::AddrBaseReg);  in Is32BitMemOperand()
231   const MCOperand &BaseReg  = MI.getOperand(Op+X86::AddrBaseReg);  in Is64BitMemOperand()
384   const MCOperand &Base     = MI.getOperand(Op+X86::AddrBaseReg);  in emitMemModRMByte()
750     unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg);  in EmitVEXOpcodePrefix()
795     unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg);  in EmitVEXOpcodePrefix()
810     unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg);  in EmitVEXOpcodePrefix()
826     unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg);  in EmitVEXOpcodePrefix()
848     unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg);  in EmitVEXOpcodePrefix()
1068     REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B  in DetermineREXPrefix()
1078     REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B  in DetermineREXPrefix()
1088     REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B  in DetermineREXPrefix()