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Searched refs:AVR (Results 1 – 25 of 69) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRELFObjectWriter.cpp80 case AVR::fixup_32: in getRelocType()
86 case AVR::fixup_16: in getRelocType()
88 case AVR::fixup_16_pm: in getRelocType()
114 case AVR::fixup_call: in getRelocType()
116 case AVR::fixup_ldi: in getRelocType()
118 case AVR::fixup_6: in getRelocType()
130 case AVR::fixup_8: in getRelocType()
132 case AVR::fixup_8_lo8: in getRelocType()
134 case AVR::fixup_8_hi8: in getRelocType()
138 case AVR::fixup_diff8: in getRelocType()
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H A DAVRELFStreamer.cpp16 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet()
18 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet()
20 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet()
22 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet()
24 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet()
26 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet()
28 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet()
30 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet()
32 else if (Features[AVR::ELFArchAVR51]) in getEFlagsForFeatureSet()
34 else if (Features[AVR::ELFArchAVR6]) in getEFlagsForFeatureSet()
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H A DAVRAsmBackend.cpp255 case AVR::fixup_7_pcrel: in adjustFixupValue()
261 case AVR::fixup_call: in adjustFixupValue()
264 case AVR::fixup_ldi: in adjustFixupValue()
267 case AVR::fixup_lo8_ldi: in adjustFixupValue()
275 case AVR::fixup_hi8_ldi: in adjustFixupValue()
318 case AVR::fixup_16: in adjustFixupValue()
323 case AVR::fixup_16_pm: in adjustFixupValue()
330 case AVR::fixup_6_adiw: in adjustFixupValue()
334 case AVR::fixup_port5: in adjustFixupValue()
338 case AVR::fixup_port6: in adjustFixupValue()
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H A DAVRMCExpr.cpp146 AVR::Fixups Kind = AVR::Fixups::LastTargetFixupKind; in getFixupKind()
150 Kind = isNegated() ? AVR::fixup_lo8_ldi_neg : AVR::fixup_lo8_ldi; in getFixupKind()
153 Kind = isNegated() ? AVR::fixup_hi8_ldi_neg : AVR::fixup_hi8_ldi; in getFixupKind()
156 Kind = isNegated() ? AVR::fixup_hh8_ldi_neg : AVR::fixup_hh8_ldi; in getFixupKind()
159 Kind = isNegated() ? AVR::fixup_ms8_ldi_neg : AVR::fixup_ms8_ldi; in getFixupKind()
163 Kind = isNegated() ? AVR::fixup_lo8_ldi_pm_neg : AVR::fixup_lo8_ldi_pm; in getFixupKind()
166 Kind = isNegated() ? AVR::fixup_hi8_ldi_pm_neg : AVR::fixup_hi8_ldi_pm; in getFixupKind()
169 Kind = isNegated() ? AVR::fixup_hh8_ldi_pm_neg : AVR::fixup_hh8_ldi_pm; in getFixupKind()
172 Kind = AVR::fixup_16_pm; in getFixupKind()
175 Kind = AVR::fixup_lo8_ldi_gs; in getFixupKind()
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H A DAVRMCCodeEmitter.cpp80 bool IsPredec = Opcode == AVR::LDRdPtrPd || Opcode == AVR::STPtrPdRr; in loadStorePostEncoder()
81 bool IsPostinc = Opcode == AVR::LDRdPtrPi || Opcode == AVR::STPtrPiRr; in loadStorePostEncoder()
91 template <AVR::Fixups Fixup>
109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget()
122 case AVR::R27R26: return 0x03; // X: 0b11 in encodeLDSTPtrReg()
123 case AVR::R29R28: return 0x02; // Y: 0b10 in encodeLDSTPtrReg()
124 case AVR::R31R30: return 0x00; // Z: 0b00 in encodeLDSTPtrReg()
147 case AVR::R31R30: in encodeMemri()
150 case AVR::R29R28: in encodeMemri()
180 template <AVR::Fixups Fixup, unsigned Offset>
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H A DAVRMCCodeEmitter.h51 template <AVR::Fixups Fixup>
73 template <AVR::Fixups Fixup, unsigned Offset>
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp40 : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI() {} in AVRInstrInfo()
222 case AVR::BREQk: in getCondFromBranchOpc()
224 case AVR::BRNEk: in getCondFromBranchOpc()
226 case AVR::BRSHk: in getCondFromBranchOpc()
228 case AVR::BRLOk: in getCondFromBranchOpc()
230 case AVR::BRMIk: in getCondFromBranchOpc()
232 case AVR::BRPLk: in getCondFromBranchOpc()
234 case AVR::BRGEk: in getCondFromBranchOpc()
236 case AVR::BRLTk: in getCondFromBranchOpc()
508 case AVR::JMPk: in getBranchDestBlock()
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H A DAVRRegisterInfo.cpp57 Reserved.set(AVR::R0); in getReservedRegs()
58 Reserved.set(AVR::R1); in getReservedRegs()
103 if ((Opcode != AVR::SUBIWRdK) && (Opcode != AVR::ADIWRdK)) { in foldFrameOffset()
115 case AVR::SUBIWRdK: in foldFrameOffset()
118 case AVR::ADIWRdK: in foldFrameOffset()
179 case AVR::R25R24: in eliminateFrameIndex()
180 case AVR::R27R26: in eliminateFrameIndex()
208 unsigned AddOpc = AVR::ADIWRdK, SubOpc = AVR::SBIWRdK; in eliminateFrameIndex()
222 BuildMI(MBB, II, dl, TII.get(AVR::INRdA), AVR::R0).addImm(0x3f); in eliminateFrameIndex()
252 return AVR::R28; in getFrameRegister()
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H A DAVRFrameLowering.cpp84 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
114 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
139 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
170 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0); in emitEpilogue()
174 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R1R0); in emitEpilogue()
178 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R29R28); in emitEpilogue()
215 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitEpilogue()
352 (Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr; in fixStackStores()
402 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
409 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP) in eliminateCallFramePseudoInstr()
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H A DAVRExpandPseudoInsts.cpp259 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
264 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
269 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
321 return expandArith(AVR::SBCRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
395 OpLo = AVR::COMRd; in expand()
396 OpHi = AVR::COMRd; in expand()
426 OpLo = AVR::CPRdRr; in expand()
491 OpLo = AVR::LDIRdK; in expand()
492 OpHi = AVR::LDIRdK; in expand()
1150 OpLo = AVR::INRdA; in expand()
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H A DAVRISelLowering.cpp940 static const MCPhysReg RegList8[] = {AVR::R24, AVR::R22, AVR::R20, in analyzeStandardArguments()
941 AVR::R18, AVR::R16, AVR::R14, in analyzeStandardArguments()
942 AVR::R12, AVR::R10, AVR::R8}; in analyzeStandardArguments()
2011 .Case("r0", AVR::R0).Case("r1", AVR::R1).Case("r2", AVR::R2) in getRegisterByName()
2012 .Case("r3", AVR::R3).Case("r4", AVR::R4).Case("r5", AVR::R5) in getRegisterByName()
2013 .Case("r6", AVR::R6).Case("r7", AVR::R7).Case("r8", AVR::R8) in getRegisterByName()
2014 .Case("r9", AVR::R9).Case("r10", AVR::R10).Case("r11", AVR::R11) in getRegisterByName()
2015 .Case("r12", AVR::R12).Case("r13", AVR::R13).Case("r14", AVR::R14) in getRegisterByName()
2016 .Case("r15", AVR::R15).Case("r16", AVR::R16).Case("r17", AVR::R17) in getRegisterByName()
2017 .Case("r18", AVR::R18).Case("r19", AVR::R19).Case("r20", AVR::R20) in getRegisterByName()
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H A DAVRISelDAGToDAG.cpp145 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
153 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
186 Opcode = AVR::LPMRdZPi; in selectIndexedProgMemLoad()
193 Opcode = AVR::LPMWRdZPi; in selectIndexedProgMemLoad()
266 if (RI.getRegClass(Reg) != &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand()
318 CurDAG->SelectNodeTo(N, AVR::FRMIDX, in select()
338 if (!RN || (RN->getReg() != AVR::SP)) { in select()
348 unsigned Opc = (VT == MVT::i16) ? AVR::STDWSPQRr : AVR::STDSPQRr; in select()
363 if (!AVR::isProgramMemoryAccess(LD)) { in select()
382 SDValue RegZ = CurDAG->getRegister(AVR::R31R30, MVT::i16); in select()
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H A DAVRRegisterInfo.td24 let Namespace = "AVR";
30 let Namespace = "AVR" in
36 let Namespace = "AVR" in {
114 def GPR8 : RegisterClass<"AVR", [i8], 8,
126 def GPR8lo : RegisterClass<"AVR", [i8], 8,
132 def LD8 : RegisterClass<"AVR", [i8], 8,
143 def LD8lo : RegisterClass<"AVR", [i8], 8,
149 def DREGS : RegisterClass<"AVR", [i16], 8,
181 def DLDREGS : RegisterClass<"AVR", [i16], 8,
192 def IWREGS : RegisterClass<"AVR", [i16], 8,
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H A DAVR.td1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
9 // This is the top level entry point for the AVR target.
19 // AVR Device Definitions
74 def AVR : Target {
H A DAVRRelaxMemOperations.cpp89 bool AVRRelaxMem::relax<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) { in relax()
100 buildMI(MBB, MBBI, AVR::PUSHWRr) in relax()
104 buildMI(MBB, MBBI, AVR::SBCIWRdK) in relax()
111 buildMI(MBB, MBBI, AVR::STWPtrRr) in relax()
116 buildMI(MBB, MBBI, AVR::POPWRd) in relax()
134 RELAX(AVR::STDWPtrQRr); in runOnInstruction()
H A DREADME.md1 # AVR backend
3 This experimental backend is for the 8-bit Atmel [AVR](https://en.wikipedia.org/wiki/Atmel_AVR) mic…
7 * [Unresolved bugs](https://llvm.org/bugs/buglist.cgi?product=libraries&component=Backend%3A%20AVR&…
H A DAVRCallingConv.td1 //===-- AVRCallingConv.td - Calling Conventions for AVR ----*- tablegen -*-===//
9 // This describes the calling conventions for AVR architecture.
13 // AVR Return Value Calling Convention
33 // AVR Argument Calling Conventions
H A DAVRAsmPrinter.cpp125 Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi in PrintAsmOperand()
126 : AVR::sub_lo); in PrintAsmOperand()
156 if (MI->getOperand(OpNum).getReg() == AVR::R31R30) { in PrintAsmMemoryOperand()
159 assert(MI->getOperand(OpNum).getReg() == AVR::R29R28 && in PrintAsmMemoryOperand()
H A DAVRInstrFormats.td1 //===-- AVRInstrInfo.td - AVR Instruction Formats ----------*- tablegen -*-===//
10 // AVR Instruction Format Definitions.
14 // A generic AVR instruction.
17 let Namespace = "AVR";
27 /// A 16-bit AVR instruction.
36 /// a 32-bit AVR instruction.
46 // Psuedo instructions are not real AVR instructions. The DAG stores
47 // psuedo instructions which are replaced by real AVR instructions by
/freebsd-12.1/contrib/llvm/lib/Target/AVR/InstPrinter/
H A DAVRInstPrinter.cpp44 case AVR::LDRdPtr: in printInst()
45 case AVR::LDRdPtrPi: in printInst()
46 case AVR::LDRdPtrPd: in printInst()
51 if (Opcode == AVR::LDRdPtrPd) in printInst()
56 if (Opcode == AVR::LDRdPtrPi) in printInst()
59 case AVR::STPtrRr: in printInst()
65 case AVR::STPtrPiRr: in printInst()
66 case AVR::STPtrPdRr: in printInst()
69 if (Opcode == AVR::STPtrPdRr) in printInst()
74 if (Opcode == AVR::STPtrPiRr) in printInst()
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/freebsd-12.1/contrib/binutils/gas/doc/
H A Dc-avr.texi8 @node AVR-Dependent
17 @cindex AVR support
24 @node AVR Options
26 @cindex AVR options (none)
82 @node AVR Syntax
90 @node AVR-Chars
107 @node AVR-Regs
127 @node AVR-Modifiers
130 @cindex AVR modifiers
131 @cindex syntax, AVR
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/freebsd-12.1/contrib/llvm/tools/lld/ELF/Arch/
H A DAVR.cpp44 class AVR final : public TargetInfo { class
46 AVR();
53 AVR::AVR() { NoneRel = R_AVR_NONE; } in AVR() function in AVR
55 RelExpr AVR::getRelExpr(RelType Type, const Symbol &S, in getRelExpr()
60 void AVR::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const { in relocateOne()
75 static AVR Target; in getAVRTargetInfo()
/freebsd-12.1/contrib/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp76 unsigned toDREG(unsigned Reg, unsigned From = AVR::sub_lo) { in toDREG()
77 MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID]; in toDREG()
327 if (RegNum == AVR::NoRegister) { in parseRegisterName()
330 if (RegNum == AVR::NoRegister) { in parseRegisterName()
340 if (RegNum == AVR::NoRegister) in parseRegisterName()
347 int RegNum = AVR::NoRegister; in parseRegister()
369 if (RegNo == AVR::NoRegister) in tryParseRegisterOperand()
544 if (RegNo == AVR::NoRegister) in parseMemriOperand()
570 return (RegNo == AVR::NoRegister); in ParseRegister()
691 if (RegNum != AVR::NoRegister) { in validateTargetOperandClass()
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/freebsd-12.1/contrib/llvm/tools/clang/lib/Driver/ToolChains/
H A DAVR.cpp27 return new tools::AVR::Linker(*this); in buildLinker()
30 void AVR::Linker::ConstructJob(Compilation &C, const JobAction &JA, in ConstructJob()
/freebsd-12.1/contrib/llvm/
H A DFREEBSD-Xlist175 lib/Target/AVR/AsmParser/CMakeLists.txt
176 lib/Target/AVR/AsmParser/LLVMBuild.txt
177 lib/Target/AVR/CMakeLists.txt
178 lib/Target/AVR/Disassembler/CMakeLists.txt
179 lib/Target/AVR/Disassembler/LLVMBuild.txt
180 lib/Target/AVR/InstPrinter/CMakeLists.txt
181 lib/Target/AVR/InstPrinter/LLVMBuild.txt
182 lib/Target/AVR/LLVMBuild.txt
184 lib/Target/AVR/MCTargetDesc/LLVMBuild.txt
185 lib/Target/AVR/TargetInfo/CMakeLists.txt
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