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/f-stack/freebsd/netinet/
H A Dip_ecn.c100 if (!outer || !inner) in ip_ecn_ingress()
103 *outer = *inner; in ip_ecn_ingress()
111 *outer &= ~IPTOS_ECN_ECT1; in ip_ecn_ingress()
117 *outer &= ~IPTOS_ECN_MASK; in ip_ecn_ingress()
132 if (!outer || !inner) in ip_ecn_egress()
152 if ((*outer & IPTOS_ECN_MASK) == IPTOS_ECN_CE) in ip_ecn_egress()
167 if (!outer || !inner) in ip6_ecn_ingress()
172 *outer &= ~htonl(0xff << 20); in ip6_ecn_ingress()
173 *outer |= htonl((u_int32_t)outer8 << 20); in ip6_ecn_ingress()
181 if (!outer || !inner) in ip6_ecn_egress()
[all …]
/f-stack/dpdk/examples/pipeline/examples/
H A Dvxlan.spec94 // Assumption: When read from the table, the outer IPv4 and UDP headers contain
97 // - The outer IPv4 header (20 bytes);
98 // - The outer UDP header (8 bytes);
99 // - The outer VXLAN header (8 bytes);
103 // - The outer UDP header (8 bytes);
104 // - The outer VXLAN header (8 bytes);
109 // the outer IPv4 and UDP headers are updated as follows:
/f-stack/dpdk/doc/guides/nics/
H A Digc.rst37 Only the outer VLAN TPID can be set to a vlan other than 0x8100.
51 outer VLAN to 0x9100:
62 testpmd> vlan set outer tpid 0x9100 0
H A Dsfc_efx.rst129 SFN8xxx and X2xxx family adapters provide either inner or outer packet classes.
131 configures the hardware to report inner classes, and outer classes are
134 outer layer 4 packet type.
154 of destination address, EtherType in the outer frame and exact match of
394 mbufs, VLAN insertion, inner/outer IPv4 and TCP/UDP checksum and TCP
H A Denic.rst269 inner and outer packets can be IPv4 or IPv6.
277 The NIC fills in IPv4/UDP/TCP checksums for both inner and outer packets.
281 The NIC validates IPv4/UDP/TCP checksums of both inner and outer packets.
283 packet has the correct checksum, and if applicable, the outer packet also
285 indicate that the inner and/or outer packets have invalid checksum values.
291 PMD does not set L3/L4 packet types for outer packets.
458 Only level 0 (outer header) RSS is allowed.
H A Dbnxt.rst350 testpmd> csum set (ip|tcp|udp|outer-ip|outer-udp) (sw|hw) (port_id)
489 // configure outer TPID value for a port
490 testpmd> vlan set outer tpid (tpid_value) (port_id)
493 outer VLAN. Note that when a packet has a single VLAN, the tag is considered as
494 outer, i.e. the inner VLAN is relevant only when a packet is double-tagged.
531 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_STRIPPED // outer VLAN is found and stripped
H A Dcxgbe.rst106 Toggle behavior to keep/strip outer VLAN in Q-in-Q packets. If
107 enabled, the outer VLAN tag is preserved in Q-in-Q packets. Otherwise,
108 the outer VLAN tag is stripped in Q-in-Q packets.
/f-stack/freebsd/contrib/device-tree/Bindings/arm/
H A Dl2c2x0.yaml49 # compatible with the ARM one with outer cache mode.
50 - marvell,aurora-outer-cache
177 arm,outer-sync-disable:
178 description: disable the outer sync operation on the L2 cache.
180 will randomly hang unless outer sync operations are disabled.
/f-stack/freebsd/contrib/device-tree/Bindings/arm/socionext/
H A Dsocionext,uniphier-system-cache.yaml7 title: UniPhier outer cache controller
10 UniPhier ARM 32-bit SoCs are integrated with a full-custom outer cache
/f-stack/app/redis-5.0.5/utils/graphs/commits-over-time/
H A Dgenhtml.tcl75 <div id="outer">
/f-stack/dpdk/doc/guides/prog_guide/
H A Dgeneric_receive_offload_lib.rst34 packets as well as VxLAN packets which contain an outer IPv4 header and an
168 VxLAN packets with an outer IPv4 header and inner TCP/IPv4 packet, is
172 - outer source and destination: Ethernet and IP address, UDP port
180 - outer IPv4 ID. The IPv4 ID fields of the packets, whose DF bit in the
181 outer IPv4 header is 0, should be increased by 1.
H A Dipsec_lib.rst71 - remove outer IP header (tunnel mode) / update IP header (transport mode)
78 - add outer IP header (tunnel mode) / update IP header (transport mode)
103 - remove outer IP header (tunnel mode) / update IP header (transport mode)
110 - add outer IP header (tunnel mode) / update IP header (transport mode)
H A Dgeneric_segmentation_offload_lib.rst163 which contain an outer IPv4 header, inner TCP/IPv4 headers, and optional
164 inner and/or outer VLAN tag(s).
169 an outer IPv4 header, inner TCP/IPv4 headers, and an optional VLAN tag.
240 For tunneled packets, the outer IPv4 headers' checksums should also be
H A Dmbuf_lib.rst162 Note that it can only work if outer L4 checksum is 0.
175 Note that it can only work if outer L4 checksum is 0.
189 Note that it can only work if outer L4 checksum is 0.
H A Drte_flow.rst370 outer or both packets.
750 Example for VXLAN TCP payload matching regardless of outer L3 (IPv4 or IPv6)
926 The corresponding standard outer EtherType (TPID) values are
1024 The corresponding standard outer EtherType (TPID) value is
2108 Implements ``OFPAT_POP_VLAN`` ("pop the outer VLAN tag") as defined
2172 Implements ``OFPAT_POP_MPLS`` ("pop the outer MPLS tag") as defined by the
2311 Adds outer header whose template is provided in its data buffer,
2337 Remove outer header whose template is provided in its data buffer,
3158 the application cannot match on the outer header fields, such as VXLAN
3178 is capable to match on outer headers after decap.
[all …]
/f-stack/dpdk/doc/guides/testpmd_app_ug/
H A Dtestpmd_funcs.rst1125 testpmd> csum set (ip|udp|tcp|sctp|outer-ip|outer-udp) (hw|sw) (port_id)
1135 * ``outer-udp`` relates to the outer UDP layer in the case where the packet is recognized
1213 ``outer-ip|outer-udp`` parameter relates to the outer headers (here ``ipv4_out`` and ``udp_out``).
4521 IPv4 VXLAN outer header::
4540 IPv6 VXLAN outer header::
4565 IPv4 NVGRE outer header::
4578 IPv6 NVGRE outer header::
4634 IPv4 MPLSoGRE outer header::
4650 IPv6 MPLSoGRE outer header::
4672 IPv4 MPLSoGRE outer header::
[all …]
/f-stack/freebsd/mips/cavium/cryptocteon/
H A Dcavium_crypto.c233 octo_calc_hash(uint8_t auth, unsigned char *key, uint64_t *inner, uint64_t *outer) in octo_calc_hash() argument
311 CVMX_MF_HSH_IV(outer[0], 0); in octo_calc_hash()
312 CVMX_MF_HSH_IV(outer[1], 1); in octo_calc_hash()
314 outer[2] = 0; in octo_calc_hash()
315 CVMX_MF_HSH_IV(outer[2], 2); in octo_calc_hash()
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Darm-realview-eb-mp.dtsi75 * since th outer sync operation can cause the
83 arm,outer-sync-disable;
H A Darm-realview-pb11mp.dts108 * since th outer sync operation can cause the
116 arm,outer-sync-disable;
H A Darmada-370.dtsi96 compatible = "marvell,aurora-outer-cache";
/f-stack/app/redis-5.0.5/deps/jemalloc/src/
H A Dextent.c1488 const extent_t *outer) { in extent_can_coalesce() argument
1490 if (extent_arena_get(outer) != arena) { in extent_can_coalesce()
1495 if (extent_state_get(outer) != extents->state) { in extent_can_coalesce()
1499 if (extent_committed_get(inner) != extent_committed_get(outer)) { in extent_can_coalesce()
1508 extents_t *extents, extent_t *inner, extent_t *outer, bool forward, in extent_coalesce() argument
1510 assert(extent_can_coalesce(arena, extents, inner, outer)); in extent_coalesce()
1512 extent_activate_locked(tsdn, arena, extents, outer); in extent_coalesce()
1516 forward ? inner : outer, forward ? outer : inner, growing_retained); in extent_coalesce()
1520 extent_deactivate_locked(tsdn, arena, extents, outer); in extent_coalesce()
/f-stack/dpdk/drivers/common/mlx5/
H A Dmlx5_devx_cmds.c1062 void *tir_ctx, *outer, *inner, *rss_key; in mlx5_devx_cmd_create_tir() local
1088 outer = MLX5_ADDR_OF(tirc, tir_ctx, rx_hash_field_selector_outer); in mlx5_devx_cmd_create_tir()
1089 MLX5_SET(rx_hash_field_select, outer, l3_prot_type, in mlx5_devx_cmd_create_tir()
1091 MLX5_SET(rx_hash_field_select, outer, l4_prot_type, in mlx5_devx_cmd_create_tir()
1093 MLX5_SET(rx_hash_field_select, outer, selected_fields, in mlx5_devx_cmd_create_tir()
1156 void *outer, *inner; in mlx5_devx_cmd_modify_tir() local
1165 outer = MLX5_ADDR_OF(tirc, tir_ctx, in mlx5_devx_cmd_modify_tir()
1167 MLX5_SET(rx_hash_field_select, outer, l3_prot_type, in mlx5_devx_cmd_modify_tir()
1169 MLX5_SET(rx_hash_field_select, outer, l4_prot_type, in mlx5_devx_cmd_modify_tir()
1172 (rx_hash_field_select, outer, selected_fields, in mlx5_devx_cmd_modify_tir()
/f-stack/dpdk/drivers/crypto/aesni_mb/
H A Daesni_mb_pmd_private.h265 uint8_t outer[128] __rte_aligned(16); member
/f-stack/dpdk/drivers/common/sfc_efx/base/
H A Defx_mae.c634 mvp = spec->emms_mask_value_pairs.outer; in efx_mae_match_spec_field_set()
831 mvp = spec->emms_mask_value_pairs.outer; in efx_mae_match_spec_is_valid()
1317 mvpl = left->emms_mask_value_pairs.outer; in efx_mae_match_specs_class_cmp()
1318 mvpr = right->emms_mask_value_pairs.outer; in efx_mae_match_specs_class_cmp()
1464 EFX_STATIC_ASSERT(sizeof (spec->emms_mask_value_pairs.outer) >= in efx_mae_outer_rule_insert()
1467 memcpy(payload + offset, spec->emms_mask_value_pairs.outer, in efx_mae_outer_rule_insert()
/f-stack/dpdk/doc/guides/sample_app_ug/
H A Dipsec_secgw.rst34 In case of complete protocol offload, the processing of headers(ESP and outer
50 * Remove ESP and outer IP header (Not needed in case of protocol offload).
60 * Add ESP and outer IP header (Not needed in case protocol offload).
1005 * ``-m`` Add IPSec tunnel mixed IP version tests - outer IP version different

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