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Searched refs:hns3_write_dev (Results 1 – 7 of 7) sorted by relevance

/f-stack/dpdk/drivers/net/hns3/
H A Dhns3_cmd.c147 hns3_write_dev(hw, HNS3_CMDQ_TX_ADDR_L_REG, 0); in hns3_cmd_clear_regs()
148 hns3_write_dev(hw, HNS3_CMDQ_TX_ADDR_H_REG, 0); in hns3_cmd_clear_regs()
149 hns3_write_dev(hw, HNS3_CMDQ_TX_DEPTH_REG, 0); in hns3_cmd_clear_regs()
150 hns3_write_dev(hw, HNS3_CMDQ_TX_HEAD_REG, 0); in hns3_cmd_clear_regs()
151 hns3_write_dev(hw, HNS3_CMDQ_TX_TAIL_REG, 0); in hns3_cmd_clear_regs()
152 hns3_write_dev(hw, HNS3_CMDQ_RX_ADDR_L_REG, 0); in hns3_cmd_clear_regs()
153 hns3_write_dev(hw, HNS3_CMDQ_RX_ADDR_H_REG, 0); in hns3_cmd_clear_regs()
154 hns3_write_dev(hw, HNS3_CMDQ_RX_DEPTH_REG, 0); in hns3_cmd_clear_regs()
155 hns3_write_dev(hw, HNS3_CMDQ_RX_HEAD_REG, 0); in hns3_cmd_clear_regs()
156 hns3_write_dev(hw, HNS3_CMDQ_RX_TAIL_REG, 0); in hns3_cmd_clear_regs()
[all …]
H A Dhns3_rxtx.c309 hns3_write_dev(rxq, HNS3_RING_RX_BASEADDR_H_REG, in hns3_init_rx_queue_hw()
312 hns3_write_dev(rxq, HNS3_RING_RX_BD_LEN_REG, in hns3_init_rx_queue_hw()
314 hns3_write_dev(rxq, HNS3_RING_RX_BD_NUM_REG, in hns3_init_rx_queue_hw()
327 hns3_write_dev(txq, HNS3_RING_TX_BD_NUM_REG, in hns3_init_tx_queue_hw()
432 hns3_write_dev(txq, HNS3_RING_TX_EN_REG, reg); in hns3_enable_txq()
449 hns3_write_dev(rxq, HNS3_RING_RX_EN_REG, reg); in hns3_enable_rxq()
856 hns3_write_dev(hw, addr, value); in hns3_set_queue_intr_gl()
872 hns3_write_dev(hw, addr, value); in hns3_set_queue_intr_rl()
889 hns3_write_dev(hw, addr, ql_value); in hns3_set_queue_intr_ql()
892 hns3_write_dev(hw, addr, ql_value); in hns3_set_queue_intr_ql()
[all …]
H A Dhns3_mbx.c441 hns3_write_dev(hw, HNS3_CMDQ_RX_HEAD_REG, crq->next_to_use); in hns3_dev_handle_mbx_msg()
H A Dhns3_ethdev.c108 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 0); in hns3_pf_disable_irq0()
114 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 1); in hns3_pf_enable_irq0()
204 hns3_write_dev(hw, HNS3_MISC_RESET_STS_REG, regclr); in hns3_clear_event_cause()
206 hns3_write_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG, regclr); in hns3_clear_event_cause()
4581 hns3_write_dev(hw, HNS3_VECTOR0_OTER_EN_REG, val); in hns3_config_all_msix_error()
5406 hns3_write_dev(hw, HNS3_GLOBAL_RESET_REG, val); in hns3_msix_process()
5457 hns3_write_dev(hw, HNS3_VECTOR0_OTER_EN_REG, reg_val); in hns3_record_imp_error()
5464 hns3_write_dev(hw, HNS3_VECTOR0_OTER_EN_REG, reg_val); in hns3_record_imp_error()
5493 hns3_write_dev(hw, HNS3_VECTOR0_OTER_EN_REG, reg_val | in hns3_prepare_reset()
H A Dhns3_ethdev_vf.c1037 hns3_write_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG, regclr); in hns3vf_clear_event_cause()
1043 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 0); in hns3vf_disable_irq0()
1049 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 1); in hns3vf_enable_irq0()
1070 hns3_write_dev(hw, HNS3_VF_RST_ING, val | HNS3_VF_RST_ING_BIT); in hns3vf_check_event_cause()
H A Dhns3_ethdev.h872 #define hns3_write_dev(a, reg, value) \ macro
H A Dhns3_intr.c1867 hns3_write_dev(hw, HNS3_CMDQ_TX_DEPTH_REG, reg_val); in hns3_notify_reset_ready()