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Searched refs:high_water (Results 1 – 25 of 42) sorted by relevance

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/f-stack/dpdk/drivers/net/octeontx/
H A Docteontx_ethdev_ops.c232 fc_conf->high_water = conf.high_water; in octeontx_dev_flow_ctrl_get()
255 if (fc_conf->high_water == fc->high_water && in octeontx_dev_flow_ctrl_set()
262 if (fc_conf->high_water > max_high_water || in octeontx_dev_flow_ctrl_set()
263 fc_conf->high_water < fc_conf->low_water) { in octeontx_dev_flow_ctrl_set()
270 if (fc_conf->high_water % BIT(4) || fc_conf->low_water % BIT(4)) { in octeontx_dev_flow_ctrl_set()
280 conf.high_water = fc_conf->high_water; in octeontx_dev_flow_ctrl_set()
290 fc->high_water = fc_conf->high_water; in octeontx_dev_flow_ctrl_set()
311 fc->def_highmark = fc_conf.high_water; in octeontx_dev_flow_ctrl_init()
328 fc_conf.high_water = fc->def_highmark; in octeontx_dev_flow_ctrl_fini()
H A Docteontx_ethdev.h100 uint16_t high_water; member
/f-stack/dpdk/drivers/net/txgbe/base/
H A Dtxgbe_dcb.c35 if (!hw->fc.high_water[tc_num] || in txgbe_dcb_pfc_enable()
42 if (hw->fc.low_water[tc_num] >= hw->fc.high_water[tc_num]) { in txgbe_dcb_pfc_enable()
120 hw->fc.high_water[tc_num]) { in txgbe_dcb_pfc_enable()
123 fcrth = TXGBE_FCWTRHI_TH(hw->fc.high_water[tc_num]) | in txgbe_dcb_pfc_enable()
H A Dtxgbe_dcb_hw.c220 reg = TXGBE_FCWTRHI_TH(hw->fc.high_water[i]) | in txgbe_dcb_config_pfc_raptor()
H A Dtxgbe_hw.c960 hw->fc.high_water[i]) { in txgbe_fc_enable()
962 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in txgbe_fc_enable()
1033 hw->fc.high_water[i]) { in txgbe_fc_enable()
1036 fcrth = TXGBE_FCWTRHI_TH(hw->fc.high_water[i]) | in txgbe_fc_enable()
H A Dtxgbe_type.h235 u32 high_water[TXGBE_DCB_TC_MAX]; /* Flow Ctrl High-water */ member
/f-stack/freebsd/contrib/zlib/
H A Ddeflate.c1573 if (s->high_water < s->window_size) {
1577 if (s->high_water < curr) {
1585 s->high_water = curr + init;
1587 else if (s->high_water < (ulg)curr + WIN_INIT) {
1593 if (init > s->window_size - s->high_water)
1594 init = s->window_size - s->high_water;
1596 s->high_water += init;
1765 if (s->high_water < s->strstart)
1766 s->high_water = s->strstart;
1794 if (s->high_water < s->strstart)
[all …]
H A Ddeflate.h269 ulg high_water; member
/f-stack/dpdk/drivers/net/e1000/
H A Dem_ethdev.c833 hw->fc.high_water = rx_buf_size - in em_hardware_init()
835 hw->fc.low_water = hw->fc.high_water - 1500; in em_hardware_init()
856 hw->fc.high_water = 0x5C20; in em_hardware_init()
1668 fc_conf->high_water = hw->fc.high_water; in eth_em_flow_ctrl_get()
1723 if ((fc_conf->high_water > max_high_water) || in eth_em_flow_ctrl_set()
1724 (fc_conf->high_water < fc_conf->low_water)) { in eth_em_flow_ctrl_set()
1732 hw->fc.high_water = fc_conf->high_water; in eth_em_flow_ctrl_set()
H A Digb_ethdev.c1663 hw->fc.high_water = rx_buf_size - (RTE_ETHER_MAX_LEN * 2); in igb_hardware_init()
1664 hw->fc.low_water = hw->fc.high_water - 1500; in igb_hardware_init()
3021 fc_conf->high_water = hw->fc.high_water; in eth_igb_flow_ctrl_get()
3076 if ((fc_conf->high_water > max_high_water) || in eth_igb_flow_ctrl_set()
3077 (fc_conf->high_water < fc_conf->low_water)) { in eth_igb_flow_ctrl_set()
3085 hw->fc.high_water = fc_conf->high_water; in eth_igb_flow_ctrl_set()
/f-stack/dpdk/drivers/net/octeontx/base/
H A Docteontx_bgx.c374 cfg->high_water = conf.high_water; in octeontx_bgx_port_flow_ctrl_cfg()
H A Docteontx_bgx.h139 uint16_t high_water; member
/f-stack/dpdk/drivers/bus/dpaa/include/
H A Dfsl_fman.h103 u32 high_water, u32 low_water, u32 bpid);
/f-stack/dpdk/drivers/net/igc/
H A Digc_ethdev.c891 hw->fc.high_water = rx_buf_size - (RTE_ETHER_MAX_LEN * 2); in igc_hardware_init()
892 hw->fc.low_water = hw->fc.high_water - 1500; in igc_hardware_init()
2147 fc_conf->high_water = hw->fc.high_water; in eth_igc_flow_ctrl_get()
2196 if (fc_conf->high_water > max_high_water || in eth_igc_flow_ctrl_set()
2197 fc_conf->high_water < fc_conf->low_water) { in eth_igc_flow_ctrl_set()
2200 fc_conf->high_water, fc_conf->low_water, in eth_igc_flow_ctrl_set()
2224 hw->fc.high_water = fc_conf->high_water; in eth_igc_flow_ctrl_set()
/f-stack/dpdk/drivers/net/ixgbe/base/
H A Dixgbe_82598.c400 hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
402 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
495 hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
497 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_82598()
H A Dixgbe_dcb_82598.c261 reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_dcb_config_pfc_82598()
H A Dixgbe_dcb_82599.c309 reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_dcb_config_pfc_82599()
/f-stack/dpdk/drivers/net/dpaa/
H A Ddpaa_ethdev.c1335 if (fc_conf->high_water < fc_conf->low_water) { in dpaa_flow_ctrl_set()
1345 fc_conf->high_water, in dpaa_flow_ctrl_set()
1355 net_fc->high_water = fc_conf->high_water; in dpaa_flow_ctrl_set()
1377 fc_conf->high_water = net_fc->high_water; in dpaa_flow_ctrl_get()
/f-stack/dpdk/drivers/net/octeontx2/
H A Dotx2_flow_ctrl.c153 if (fc_conf->high_water || fc_conf->low_water || fc_conf->pause_time || in otx2_nix_flow_ctrl_set()
/f-stack/dpdk/drivers/bus/dpaa/base/fman/
H A Dfman_hw.c389 fman_if_set_fc_threshold(struct fman_if *fm_if, u32 high_water, in fman_if_set_fc_threshold() argument
399 return bm_pool_set_hw_threshold(bpid, low_water, high_water); in fman_if_set_fc_threshold()
/f-stack/dpdk/drivers/net/txgbe/
H A Dtxgbe_ethdev.c552 hw->fc.high_water[i] = TXGBE_FC_XOFF_HITH; in eth_txgbe_dev_init()
2883 fc_conf->high_water = hw->fc.high_water[0]; in txgbe_flow_ctrl_get()
2945 if (fc_conf->high_water > max_high_water || in txgbe_flow_ctrl_set()
2946 fc_conf->high_water < fc_conf->low_water) { in txgbe_flow_ctrl_set()
2954 hw->fc.high_water[0] = fc_conf->high_water; in txgbe_flow_ctrl_set()
3005 if (pfc_conf->fc.high_water > max_high_water || in txgbe_priority_flow_ctrl_set()
3006 pfc_conf->fc.high_water <= pfc_conf->fc.low_water) { in txgbe_priority_flow_ctrl_set()
3016 hw->fc.high_water[tc_num] = pfc_conf->fc.high_water; in txgbe_priority_flow_ctrl_set()
/f-stack/dpdk/drivers/net/axgbe/
H A Daxgbe_ethdev.h499 uint32_t high_water[AXGBE_PRIORITY_QUEUES]; member
H A Daxgbe_ethdev.c1208 fc.high_water[0] = AXGMAC_MTL_IOREAD_BITS(pdata, 0, MTL_Q_RQFCR, RFD); in axgbe_flow_ctrl_get()
1221 fc_conf->high_water = (1024 + (fc.low_water[0] << 9)) / 1024; in axgbe_flow_ctrl_get()
1222 fc_conf->low_water = (1024 + (fc.high_water[0] << 9)) / 1024; in axgbe_flow_ctrl_get()
1242 AXGMAC_FLOW_CONTROL_VALUE(1024 * fc_conf->high_water)); in axgbe_flow_ctrl_set()
1296 AXGMAC_FLOW_CONTROL_VALUE(1024 * pfc_conf->fc.high_water)); in axgbe_priority_flow_ctrl_set()
/f-stack/dpdk/drivers/net/ixgbe/
H A Dixgbe_ethdev.c1142 hw->fc.high_water[i] = IXGBE_FC_HI; in eth_ixgbe_dev_init()
4703 fc_conf->high_water = hw->fc.high_water[0]; in ixgbe_flow_ctrl_get()
4772 if ((fc_conf->high_water > max_high_water) || in ixgbe_flow_ctrl_set()
4773 (fc_conf->high_water < fc_conf->low_water)) { in ixgbe_flow_ctrl_set()
4781 hw->fc.high_water[0] = fc_conf->high_water; in ixgbe_flow_ctrl_set()
4826 if (hw->fc.low_water[tc_num] >= hw->fc.high_water[tc_num]) { in ixgbe_dcb_pfc_enable_generic()
4905 hw->fc.high_water[tc_num]) { in ixgbe_dcb_pfc_enable_generic()
4908 fcrth = (hw->fc.high_water[tc_num] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_dcb_pfc_enable_generic()
4977 if ((pfc_conf->fc.high_water > max_high_water) || in ixgbe_priority_flow_ctrl_set()
4978 (pfc_conf->fc.high_water <= pfc_conf->fc.low_water)) { in ixgbe_priority_flow_ctrl_set()
[all …]
/f-stack/dpdk/drivers/net/e1000/base/
H A De1000_hw.h862 u32 high_water; /* Flow control high-water mark */ member

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