| /f-stack/dpdk/drivers/common/sfc_efx/base/ |
| H A D | efx_mac.c | 116 old_pdu = epp->ep_mac_pdu; in efx_mac_pdu_set()
126 epp->ep_mac_pdu = old_pdu; in efx_mac_pdu_set()
221 old_mulcst = epp->ep_mulcst; in efx_mac_filter_set()
223 old_brdcst = epp->ep_brdcst; in efx_mac_filter_set()
226 epp->ep_mulcst = mulcst; in efx_mac_filter_set()
228 epp->ep_brdcst = brdcst; in efx_mac_filter_set()
342 old_fcntl = epp->ep_fcntl; in efx_mac_fcntl_set()
346 epp->ep_fcntl = fcntl; in efx_mac_fcntl_set()
378 epp->ep_fcntl = old_fcntl; in efx_mac_fcntl_set()
917 epp->ep_emop = emop; in efx_mac_select()
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| H A D | efx_phy.c | 82 epp->ep_port = encp->enc_port; in efx_phy_probe()
122 epp->ep_epop = epop; in efx_phy_probe()
129 epp->ep_port = 0; in efx_phy_probe()
130 epp->ep_phy_type = 0; in efx_phy_probe()
176 epp->ep_phy_led_mode = mode; in efx_phy_led_set()
243 epp->ep_adv_cap_mask = mask; in efx_phy_adv_cap_set()
280 *maskp = epp->ep_lp_cap_mask; in efx_phy_lp_cap_get()
621 epp->ep_epop = NULL; in efx_phy_unprobe()
623 epp->ep_adv_cap_mask = 0; in efx_phy_unprobe()
625 epp->ep_port = 0; in efx_phy_unprobe()
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| H A D | efx_port.c | 14 efx_port_t *epp = &(enp->en_port); in efx_port_init() local
15 const efx_phy_ops_t *epop = epp->ep_epop; in efx_port_init()
29 epp->ep_mac_type = EFX_MAC_INVALID; in efx_port_init()
30 epp->ep_link_mode = EFX_LINK_UNKNOWN; in efx_port_init()
31 epp->ep_mac_drain = B_TRUE; in efx_port_init()
37 epp->ep_emop->emo_reconfigure(enp); in efx_port_init()
79 efx_port_t *epp = &(enp->en_port); in efx_port_poll() local
111 efx_port_t *epp = &(enp->en_port); in efx_port_loopback_set() local
219 EFSYS_ASSERT(epp->ep_mac_drain); in efx_port_fini()
221 epp->ep_emop = NULL; in efx_port_fini()
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| H A D | siena_mac.c | 17 efx_port_t *epp = &(enp->en_port); in siena_mac_poll() local
25 epp->ep_fcntl = sls.sls_fcntl; in siena_mac_poll()
68 efx_port_t *epp = &(enp->en_port); in siena_mac_reconfigure() local
87 epp->ep_mac_addr); in siena_mac_reconfigure()
92 if (epp->ep_fcntl_autoneg) in siena_mac_reconfigure()
110 epp->ep_all_unicst_inserted = epp->ep_all_unicst; in siena_mac_reconfigure()
114 if (epp->ep_all_mulcst) { in siena_mac_reconfigure()
118 } else if (epp->ep_mulcst) { in siena_mac_reconfigure()
134 if (epp->ep_brdcst) { in siena_mac_reconfigure()
162 epp->ep_all_mulcst_inserted = epp->ep_all_mulcst; in siena_mac_reconfigure()
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| H A D | ef10_mac.c | 18 efx_port_t *epp = &(enp->en_port); in ef10_mac_poll() local
26 epp->ep_fcntl = els.epls.epls_fcntl; in ef10_mac_poll()
76 efx_port_t *epp = &(enp->en_port); in efx_mcdi_vadapter_set_mac() local
91 epp->ep_mac_addr); in efx_mcdi_vadapter_set_mac()
287 epp->ep_mac_addr); in ef10_mac_reconfigure()
333 epp->ep_all_unicst, epp->ep_mulcst, in ef10_mac_reconfigure()
334 epp->ep_all_mulcst, epp->ep_brdcst, in ef10_mac_reconfigure()
383 epp->ep_all_unicst, epp->ep_mulcst, in ef10_mac_filter_default_rxq_set()
384 epp->ep_all_mulcst, epp->ep_brdcst, in ef10_mac_filter_default_rxq_set()
410 epp->ep_all_unicst, epp->ep_mulcst, in ef10_mac_filter_default_rxq_clear()
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| H A D | siena_phy.c | 91 efx_port_t *epp = &(enp->en_port); in siena_phy_link_ev() local
135 epp->ep_lp_cap_mask = lp_cap_mask; in siena_phy_link_ev()
136 if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_AN)) in siena_phy_link_ev()
137 epp->ep_fcntl = fcntl; in siena_phy_link_ev()
244 efx_port_t *epp = &(enp->en_port); in siena_phy_reconfigure() local
262 cap_mask = epp->ep_adv_cap_mask; in siena_phy_reconfigure()
277 epp->ep_loopback_type); in siena_phy_reconfigure()
278 switch (epp->ep_loopback_link_mode) { in siena_phy_reconfigure()
298 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags); in siena_phy_reconfigure()
319 switch (epp->ep_phy_led_mode) { in siena_phy_reconfigure()
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| H A D | ef10_phy.c | 171 efx_port_t *epp = &(enp->en_port); in ef10_phy_link_ev() local
229 epp->ep_lp_cap_mask = lp_cap_mask; in ef10_phy_link_ev()
230 epp->ep_fcntl = fcntl; in ef10_phy_link_ev()
493 efx_port_t *epp = &(enp->en_port); in ef10_phy_reconfigure() local
507 loopback_type = epp->ep_loopback_type; in ef10_phy_reconfigure()
508 loopback_link_mode = epp->ep_loopback_link_mode; in ef10_phy_reconfigure()
514 phy_flags = epp->ep_phy_flags; in ef10_phy_reconfigure()
519 rc = efx_mcdi_phy_set_link(enp, epp->ep_adv_cap_mask, in ef10_phy_reconfigure()
527 phy_led_mode = epp->ep_phy_led_mode; in ef10_phy_reconfigure()
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| H A D | ef10_filter.c | 1771 efx_port_t *epp = &(enp->en_port); in ef10_filter_remove_all_existing_filters() local
1792 epp->ep_all_unicst_inserted = B_FALSE; in ef10_filter_remove_all_existing_filters()
1793 epp->ep_all_mulcst_inserted = B_FALSE; in ef10_filter_remove_all_existing_filters()
1826 efx_port_t *epp = &(enp->en_port); variable
1854 epp->ep_all_unicst_inserted = B_TRUE;
1881 efx_port_t *epp = &(enp->en_port); variable
1897 epp->ep_all_mulcst_inserted = B_TRUE;
1975 efx_port_t *epp = &(enp->en_port); variable
2051 epp->ep_all_mulcst_inserted = B_FALSE;
2073 epp->ep_all_unicst_inserted = B_FALSE;
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| H A D | hunt_nic.c | 74 efx_port_t *epp = &(enp->en_port); in hunt_board_cfg() local
124 if (epp->ep_default_adv_cap_mask & EFX_PHY_CAP_40000FDX) in hunt_board_cfg()
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| H A D | ef10_nic.c | 132 efx_port_t *epp = &(enp->en_port); in ef10_nic_get_port_mode_bandwidth() local
146 if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_25000FDX)) in ef10_nic_get_port_mode_bandwidth()
151 if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_50000FDX)) in ef10_nic_get_port_mode_bandwidth()
156 if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_100000FDX)) in ef10_nic_get_port_mode_bandwidth()
1833 efx_port_t *epp = &(enp->en_port); in efx_mcdi_nic_board_cfg() local
1920 if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_BASER_FEC)) in efx_mcdi_nic_board_cfg()
1921 epp->ep_phy_cap_mask |= in efx_mcdi_nic_board_cfg()
1923 if (epp->ep_phy_cap_mask & (1u << EFX_PHY_CAP_RS_FEC)) in efx_mcdi_nic_board_cfg()
1924 epp->ep_phy_cap_mask |= in efx_mcdi_nic_board_cfg()
1927 epp->ep_phy_cap_mask |= in efx_mcdi_nic_board_cfg()
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| H A D | siena_nic.c | 313 efx_port_t *epp = &(enp->en_port); in siena_nic_probe() local
356 epp->ep_default_adv_cap_mask = sls.sls_adv_cap_mask; in siena_nic_probe()
357 epp->ep_adv_cap_mask = sls.sls_adv_cap_mask; in siena_nic_probe()
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| H A D | efx_mcdi.c | 1607 efx_port_t *epp = &(enp->en_port); in efx_mcdi_get_phy_cfg() local
1667 epp->ep_fixed_port_type = (efx_phy_media_type_t)phy_media_type; in efx_mcdi_get_phy_cfg()
1668 if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES) in efx_mcdi_get_phy_cfg()
1669 epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID; in efx_mcdi_get_phy_cfg()
1671 epp->ep_phy_cap_mask = in efx_mcdi_get_phy_cfg()
2393 efx_port_t *epp = &(enp->en_port); in efx_mcdi_phy_module_get_info() local
2409 switch (epp->ep_fixed_port_type) { in efx_mcdi_phy_module_get_info()
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| /f-stack/freebsd/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-host1x.txt | 68 - epp: encoder pre-processor
71 - compatible: "nvidia,tegra<chip>-epp"
79 - epp
368 epp {
369 compatible = "nvidia,tegra20-epp";
374 reset-names = "epp";
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | tegra20.dtsi | 67 epp@540c0000 {
68 compatible = "nvidia,tegra20-epp";
73 reset-names = "epp";
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| H A D | tegra30.dtsi | 152 epp@540c0000 {
153 compatible = "nvidia,tegra30-epp";
158 reset-names = "epp";
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