| /f-stack/tools/libutil/ |
| H A D | humanize_number.c | 57 int64_t divisor, max; in humanize_number() local 89 divisor = 1024; in humanize_number() 98 divisor = 1000; in humanize_number() 105 divisor = 1024; in humanize_number() 150 remainder = quotient % divisor; in humanize_number() 151 quotient /= divisor; in humanize_number() 158 remainder = quotient % divisor; in humanize_number() 159 quotient /= divisor; in humanize_number() 171 divisor / 10); in humanize_number() 172 s2 = ((remainder * 10 + divisor / 2) / divisor) % 10; in humanize_number() [all …]
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| /f-stack/app/redis-5.0.5/deps/jemalloc/test/unit/ |
| H A D | div.c | 6 for (size_t divisor = 2; divisor < 1000 * 1000; ++divisor) { in TEST_BEGIN() local 8 div_init(&div_info, divisor); in TEST_BEGIN() 9 size_t max = 1000 * divisor; in TEST_BEGIN() 13 for (size_t dividend = 0; dividend < 1000 * divisor; in TEST_BEGIN() 14 dividend += divisor) { in TEST_BEGIN() 17 assert_zu_eq(dividend, quotient * divisor, in TEST_BEGIN() 19 "got quotient %zu", divisor, dividend, quotient); in TEST_BEGIN()
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| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ti/ |
| H A D | divider.txt | 8 the register is one less than the actual divisor value. E.g: 10 register value actual divisor value 17 ti,index-starts-at-one - valid divisor values start at 1, not the default 19 register value actual divisor value 24 ti,index-power-of-two - valid divisor values are powers of two. E.g: 25 register value actual divisor value 34 Which will map the resulting values to a divisor table by their index: 35 register value actual divisor value 38 2 <invalid divisor, skipped> 65 - ti,min-div : min divisor for dividing the input clock rate, only [all …]
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| /f-stack/freebsd/contrib/octeon-sdk/ |
| H A D | cvmx-uart.c | 95 uint16_t divisor; in cvmx_uart_setup2() local 106 divisor = 1; in cvmx_uart_setup2() 108 … divisor = ((unsigned long)(cpu_clock_hertz + 8 * baudrate) / (unsigned long)(16 * baudrate)); in cvmx_uart_setup2() 130 cvmx_write_csr(CVMX_MIO_UARTX_DLL(uart_index), divisor & 0xff); in cvmx_uart_setup2() 131 cvmx_write_csr(CVMX_MIO_UARTX_DLH(uart_index), (divisor>>8) & 0xff); in cvmx_uart_setup2() 141 read_cycle += (2 * divisor * 16) + 10000; in cvmx_uart_setup2()
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| H A D | cvmx-helper-jtag.c | 75 int divisor; in cvmx_helper_qlm_jtag_init() local 77 divisor = cvmx_clock_get_rate(CVMX_CLOCK_SCLK) / (1000000 * in cvmx_helper_qlm_jtag_init() 80 divisor = (divisor-1)>>2; in cvmx_helper_qlm_jtag_init() 82 while (divisor) in cvmx_helper_qlm_jtag_init() 85 divisor>>=1; in cvmx_helper_qlm_jtag_init()
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| /f-stack/tools/libxo/libxo/ |
| H A D | xo_humanize.h | 68 int64_t divisor, max; in xo_humanize_number() local 85 divisor = 1000; in xo_humanize_number() 95 divisor = 1024; in xo_humanize_number() 141 scalable /= divisor; in xo_humanize_number() 147 scalable /= divisor; in xo_humanize_number()
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| /f-stack/freebsd/mips/cavium/ |
| H A D | uart_dev_oct16550.c | 110 int divisor; in oct16550_delay() local 128 if (divisor <= 134) in oct16550_delay() 137 int actual_baud, divisor; in oct16550_divisor() local 144 if (divisor == 0 || divisor >= 65536) in oct16550_divisor() 146 actual_baud = rclk / (divisor << 4); in oct16550_divisor() 155 return (divisor); in oct16550_divisor() 226 int divisor; in oct16550_param() local 245 if (divisor == 0) in oct16550_param() 530 int baudrate, divisor, error; in oct16550_bus_ioctl() local 580 divisor = uart_getreg(bas, REG_DLL) | in oct16550_bus_ioctl() [all …]
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| /f-stack/app/redis-5.0.5/deps/jemalloc/src/ |
| H A D | nstime.c | 88 nstime_idivide(nstime_t *time, uint64_t divisor) { in nstime_idivide() argument 89 assert(divisor != 0); in nstime_idivide() 91 time->ns /= divisor; in nstime_idivide() 95 nstime_divide(const nstime_t *time, const nstime_t *divisor) { in nstime_divide() argument 96 assert(divisor->ns != 0); in nstime_divide() 98 return time->ns / divisor->ns; in nstime_divide()
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| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ |
| H A D | vt8500.txt | 44 - divisor-reg : shall be the register offset from PMC base for the divisor 47 - divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f 70 divisor-reg = <0x328>; 71 divisor-mask = <0x3f>;
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| H A D | st,stm32-rcc.txt | 87 12 CLK_I2SQ_PDIV (post divisor of pll i2s q divisor) 88 13 CLK_SAIQ_PDIV (post divisor of pll sai q divisor)
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | wm8750.dtsi | 130 divisor-reg = <0x300>; 137 divisor-reg = <0x304>; 144 divisor-reg = <0x320>; 151 divisor-reg = <0x310>; 206 divisor-reg = <0x350>; 215 divisor-reg = <0x330>; 216 divisor-mask = <0x3f>; 225 divisor-reg = <0x3A0>; 234 divisor-reg = <0x3A4>;
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| H A D | wm8850.dtsi | 141 divisor-reg = <0x300>; 148 divisor-reg = <0x304>; 155 divisor-reg = <0x320>; 162 divisor-reg = <0x310>; 201 divisor-reg = <0x350>; 210 divisor-reg = <0x330>; 211 divisor-mask = <0x3f>;
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| H A D | wm8650.dtsi | 124 divisor-reg = <0x300>; 131 divisor-reg = <0x304>; 138 divisor-reg = <0x320>; 145 divisor-reg = <0x310>; 168 divisor-reg = <0x328>; 169 divisor-mask = <0x3f>;
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| H A D | wm8505.dtsi | 120 divisor-reg = <0x300>; 127 divisor-reg = <0x304>; 134 divisor-reg = <0x350>; 141 divisor-reg = <0x310>; 196 divisor-reg = <0x328>; 197 divisor-mask = <0x3f>;
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| /f-stack/freebsd/arm64/broadcom/brcmmdio/ |
| H A D | mdio_mux_iproc.c | 238 uint32_t divisor; in brcm_iproc_config() local 250 divisor = sc->clock_rate / MDIO_OPERATING_FREQUENCY; in brcm_iproc_config() 251 divisor = divisor / (MDIO_RATE_ADJ_DIVIDENT + 1); in brcm_iproc_config() 252 val = divisor; in brcm_iproc_config()
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| /f-stack/freebsd/contrib/zstd/lib/common/ |
| H A D | zstd_deps.h | 70 #define ZSTD_div64(dividend, divisor) ((dividend) / (divisor)) argument
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| /f-stack/app/redis-5.0.5/deps/jemalloc/include/jemalloc/internal/ |
| H A D | nstime.h | 25 void nstime_idivide(nstime_t *time, uint64_t divisor); 26 uint64_t nstime_divide(const nstime_t *time, const nstime_t *divisor);
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| H A D | div.h | 23 void div_init(div_info_t *div_info, size_t divisor);
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| /f-stack/dpdk/drivers/raw/ifpga/base/ |
| H A D | opae_i2c.c | 433 u32 divisor = dev->i2c_clk / dev->bus_clk_rate; in altera_i2c_hardware_init() local 442 t_high = divisor*1/2; in altera_i2c_hardware_init() 443 t_low = divisor*1/2; in altera_i2c_hardware_init() 447 t_high = divisor*1/3; in altera_i2c_hardware_init() 448 t_low = divisor*2/3; in altera_i2c_hardware_init() 454 __func__, dev->bus_clk_rate, clk_mhz, divisor); in altera_i2c_hardware_init()
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| /f-stack/freebsd/mips/atheros/ar531x/ |
| H A D | ar5312_chip.c | 99 const uint32_t divisor = (0x5421 >> (predivisor * 4)) & 15; in ar5312_chip_detect_sys_frequency() local 101 const uint32_t cpufreq = (40000000 / divisor) * multiplier; in ar5312_chip_detect_sys_frequency()
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| /f-stack/freebsd/contrib/device-tree/Bindings/sound/ |
| H A D | cs42l52.txt | 14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency. 43 cirrus,chgfreq-divisor = <0x05>;
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| H A D | cs42l56.txt | 17 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency. 59 cirrus,chgfreq-divisor = <0x05>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/serial/ |
| H A D | brcm,bcm2835-aux-uart.txt | 9 divisor.
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| H A D | brcm,bcm6345-uart.txt | 12 divisor.
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| /f-stack/freebsd/mips/mediatek/ |
| H A D | uart_dev_mtk.c | 372 int baudrate, divisor, error; in mtk_uart_bus_ioctl() local 382 divisor = uart_getreg(bas, UART_CDDL_REG); in mtk_uart_bus_ioctl() 383 baudrate = bas->rclk / (divisor * 16); in mtk_uart_bus_ioctl()
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