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Searched refs:GLINT_DYN_CTL (Results 1 – 2 of 2) sorted by relevance

/f-stack/dpdk/drivers/net/ice/
H A Dice_ethdev.c1268 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), in ice_pf_enable_irq0()
1281 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M); in ice_pf_disable_irq0()
2328 ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), in ice_vsi_disable_queues_intr()
2333 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), GLINT_DYN_CTL_WB_ON_ITR_M); in ice_vsi_disable_queues_intr()
3369 ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), in ice_vsi_enable_queues_intr()
3376 ICE_WRITE_REG(hw, GLINT_DYN_CTL(0), in ice_vsi_enable_queues_intr()
4521 ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val); in ice_rx_queue_intr_enable()
4537 ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), GLINT_DYN_CTL_WB_ON_ITR_M); in ice_rx_queue_intr_disable()
/f-stack/dpdk/drivers/net/ice/base/
H A Dice_hw_autogen.h4493 #define GLINT_DYN_CTL(_INT) (0x00160000 + ((_INT) * 4)) /* _i=0...2047 */ /* Reset Source: CORER … macro