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/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_pwhash/argon2/
H A Dblamka-round-avx512f.h20 A1 = muladd(A1, B1); \
41 A1 = muladd(A1, B1); \
96 #define SWAP_HALVES(A0, A1) \ argument
102 A1 = t1; \
105 #define SWAP_QUARTERS(A0, A1) \ argument
107 SWAP_HALVES(A0, A1); \
109 A1 = _mm512_permutexvar_epi64(_mm512_setr_epi64(0, 1, 4, 5, 2, 3, 6, 7), A1); \
115 A1 = _mm512_permutexvar_epi64(_mm512_setr_epi64(0, 1, 4, 5, 2, 3, 6, 7), A1); \
116 SWAP_HALVES(A0, A1); \
123 SWAP_HALVES(A1, B1); \
[all …]
H A Dblamka-round-avx2.h12 #define G1_AVX2(A0, A1, B0, B1, C0, C1, D0, D1) \ argument
27 ml = _mm256_mul_epu32(A1, B1); \
29 A1 = _mm256_add_epi64(A1, _mm256_add_epi64(B1, ml)); \
30 D1 = _mm256_xor_si256(D1, A1); \
41 #define G2_AVX2(A0, A1, B0, B1, C0, C1, D0, D1) \ argument
55 ml = _mm256_mul_epu32(A1, B1); \
57 A1 = _mm256_add_epi64(A1, _mm256_add_epi64(B1, ml)); \
58 D1 = _mm256_xor_si256(D1, A1); \
126 G1_AVX2(A0, A1, B0, B1, C0, C1, D0, D1) \
127 G2_AVX2(A0, A1, B0, B1, C0, C1, D0, D1) \
[all …]
H A Dblamka-round-ssse3.h31 #define G1(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
34 A1 = fBlaMka(A1, B1); \
37 D1 = _mm_xor_si128(D1, A1); \
52 #define G2(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
55 A1 = fBlaMka(A1, B1); \
58 D1 = _mm_xor_si128(D1, A1); \
73 #define DIAGONALIZE(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
90 #define UNDIAGONALIZE(A0, B0, C0, D0, A1, B1, C1, D1) \ argument
107 #define BLAKE2_ROUND(A0, A1, B0, B1, C0, C1, D0, D1) \ argument
109 G1(A0, B0, C0, D0, A1, B1, C1, D1); \
[all …]
/f-stack/freebsd/contrib/libsodium/src/libsodium/crypto_stream/chacha20/dolbeau/
H A Du8.h67 #define VEC8_ROUND_SEQ(A1, B1, C1, D1, A2, B2, C2, D2, A3, B3, C3, D3, A4, B4, \ argument
69 VEC8_LINE1(A1, B1, C1, D1); \
73 VEC8_LINE2(A1, B1, C1, D1); \
77 VEC8_LINE3(A1, B1, C1, D1); \
81 VEC8_LINE4(A1, B1, C1, D1); \
86 #define VEC8_ROUND_HALF(A1, B1, C1, D1, A2, B2, C2, D2, A3, B3, C3, D3, A4, \ argument
88 VEC8_LINE1(A1, B1, C1, D1); \
90 VEC8_LINE2(A1, B1, C1, D1); \
92 VEC8_LINE3(A1, B1, C1, D1); \
94 VEC8_LINE4(A1, B1, C1, D1); \
[all …]
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Darmada-388-clearfog-pro.dts3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
10 model = "SolidRun Clearfog Pro A1";
H A Darmada-388-clearfog-base.dts3 * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
12 model = "SolidRun Clearfog Base A1";
H A Darmada-388-clearfog.dts3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
12 model = "SolidRun Clearfog A1";
H A Dkirkwood-dns320.dts7 model = "D-Link DNS-320 NAS (Rev A1)";
H A Dkirkwood-dns325.dts7 model = "D-Link DNS-325 NAS (Rev A1)";
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Drenesas,rza1-irqc.txt1 DT bindings for the Renesas RZ/A1 Interrupt Controller
3 The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas
4 RZ/A1 and RZ/A2 SoCs:
H A Drenesas,rza1-irqc.yaml7 title: Renesas RZ/A1 Interrupt Controller
14 The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas RZ/A1 and
/f-stack/freebsd/mips/conf/
H A DDIR-655A12 # DIR-655A1 - 3x3 2GHz D-Link AP
15 ident DIR-655A1
18 hints "DIR-655A1.hints"
/f-stack/app/redis-5.0.5/src/
H A Drand.c58 #define A1 0xDEEC macro
63 #define SEED(x0, x1, x2) (SET3(x, x0, x1, x2), SET3(a, A0, A1, A2), c = C)
68 static uint32_t x[3] = { X0, X1, X2 }, a[3] = { A0, A1, A2 }, c = C;
/f-stack/freebsd/contrib/ngatm/netnatm/api/
H A Dunisap.c152 #define COMMON_OVERLAP(A1,A2) \ argument
153 if ((A1->tag == UNISVE_ABSENT && A2->tag == UNISVE_ABSENT) || \
154 A1->tag == UNISVE_ANY || A2->tag == UNISVE_ANY) \
156 if ((A1->tag == UNISVE_ABSENT && A2->tag == UNISVE_PRESENT) || \
157 (A2->tag == UNISVE_ABSENT && A1->tag == UNISVE_PRESENT)) \
/f-stack/freebsd/contrib/device-tree/Bindings/timer/
H A Drenesas,cmt.yaml28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
29 - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1
30 - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1
31 - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1
32 - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Drenesas,cpg-mstp-clocks.yaml24 - renesas,r7s72100-mstp-clocks # RZ/A1
26 - renesas,r8a7740-mstp-clocks # R-Mobile A1
H A Drenesas,rz-cpg-clocks.txt1 * Renesas RZ/A1 Clock Pulse Generator (CPG)
3 The CPG generates core clocks for the RZ/A1 SoCs. It includes the PLL, variable
H A Drenesas,cpg-clocks.yaml23 - const: renesas,r8a7740-cpg-clocks # R-Mobile A1
29 - const: renesas,rz-cpg-clocks # RZ/A1
43 description: Board-specific settings of the MD_CK* bits on R-Mobile A1
H A Drenesas,cpg-div6-clock.yaml22 - renesas,r8a7740-div6-clock # R-Mobile A1
/f-stack/freebsd/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-a1-ad401.dts12 model = "Amlogic Meson A1 AD401 Development Board";
/f-stack/freebsd/contrib/device-tree/Bindings/iio/dac/
H A Dds4424.txt18 reg = <0x10>; /* When A0, A1 pins are ground */
/f-stack/freebsd/contrib/device-tree/Bindings/power/
H A Damlogic,meson-sec-pwrc.yaml15 Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node
/f-stack/freebsd/contrib/device-tree/Bindings/reset/
H A Damlogic,meson-reset.yaml19 - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs
/f-stack/dpdk/doc/guides/sample_app_ug/
H A Dipsec_secgw.rst554 For example: *cipher_key A1:B2:C3:D4:A1:B2:C3:D4:A1:B2:C3:D4:
555 A1:B2:C3:D4*
580 For example: *auth_key A1:B2:C3:D4:A1:B2:C3:D4:A1:B2:C3:D4:A1:B2:C3:D4:
581 A1:B2:C3:D4*
609 For example: *aead_key A1:B2:C3:D4:A1:B2:C3:D4:A1:B2:C3:D4:
610 A1:B2:C3:D4:A1:B2:C3:D4*
/f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/
H A Drenesas,dbsc.yaml22 - renesas,dbsc3-r8a7740 # R-Mobile A1

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