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/dpdk/drivers/net/atlantic/hw_atl/
H A Dhw_atl_llh.h19 u32 semaphore);
22 u32 hw_atl_reg_glb_cpu_sem_get(struct aq_hw_s *aq_hw, u32 semaphore);
114 u32 rx);
118 u32 tx);
167 u32 dca);
195 u32 dca);
261 u32 queue);
378 u32 user_priority_tc_map, u32 tc);
513 u32 lro_max_desc_num, u32 lro);
663 u32 tc);
[all …]
H A Dhw_atl_llh.c15 u32 semaphore) in hw_atl_reg_glb_cpu_sem_set()
20 u32 hw_atl_reg_glb_cpu_sem_get(struct aq_hw_s *aq_hw, u32 semaphore) in hw_atl_reg_glb_cpu_sem_get()
106 u32 rx) in hw_atl_itr_irq_map_en_rx_set()
147 u32 tx) in hw_atl_itr_irq_map_en_tx_set()
340 u32 dca) in hw_atl_rdm_rx_desc_dca_en_set()
411 u32 dca) in hw_atl_rdm_rx_head_dca_en_set()
420 u32 dca) in hw_atl_rdm_rx_pld_dca_en_set()
439 u32 regidx) in hw_atl_reg_gen_irq_map_set()
730 u32 user_priority_tc_map, u32 tc) in hw_atl_rpf_rpb_user_priority_tc_map_set()
904 u32 etht_user_priority_en, u32 filter) in hw_atl_rpf_etht_user_priority_en_set()
[all …]
H A Dhw_atl_utils.h21 u32:1;
23 u32 dd:1;
26 u32:14;
95 u32 uprc;
96 u32 mprc;
97 u32 bprc;
98 u32 erpt;
99 u32 uptc;
100 u32 mptc;
109 u32 dpc;
[all …]
H A Dhw_atl_utils_fw2x.c42 u32 crc;
46 u32 msg_id;
118 static u32 fw2x_to_eee_mask(u32 speed) in fw2x_to_eee_mask()
216 u32 h = 0U; in aq_fw2x_get_mac_permanent()
217 u32 l = 0U; in aq_fw2x_get_mac_permanent()
527 u32 *data, u32 len, u32 offset) in aq_fw2x_get_eeprom()
529 u32 bytes_remains = len % sizeof(u32); in aq_fw2x_get_eeprom()
530 u32 num_dwords = len / sizeof(u32); in aq_fw2x_get_eeprom()
615 u32 *data, u32 len, u32 offset) in aq_fw2x_set_eeprom()
640 u32 num_dwords = len / sizeof(u32); in aq_fw2x_set_eeprom()
[all …]
/dpdk/drivers/net/ice/base/
H A Dice_cgu_regs.h23 u32 misc6 : 1;
26 u32 misc24 : 12;
28 u32 val;
36 u32 misc15 : 3;
39 u32 misc19 : 1;
42 u32 misc27 : 1;
44 u32 val;
68 u32 val;
82 u32 val;
97 u32 val;
[all …]
H A Dice_sched.h39 u32 bw; /* in Kbps */
51 u32 bw; /* requested */
67 u32 agg_id;
157 u32 max_bw, u32 shared_bw);
161 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
162 u32 max_bw, u32 shared_bw);
167 u32 min_bw, u32 max_bw, u32 shared_bw);
195 u32 min_bw, u32 max_bw, u32 shared_bw);
197 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
198 u32 max_bw, u32 shared_bw);
[all …]
/dpdk/drivers/net/qede/
H A Dqede_debug.h26 u32 *num_dumped_bytes);
82 struct ecore_ptt *p_ptt, u32 *buf, u32 addr, u32 len);
156 u32 *dump_buf,
353 u32 *dump_buf,
388 u32 *dump_buf,
431 u32 data;
450 u32 modules_num;
452 u32 formats_num;
510 u32 *dump_buf,
526 u32 *dump_buf,
[all …]
H A Dqede_debug.c88 static u32 cond5(const u32 *r, const u32 *imm) in cond5()
93 static u32 cond7(const u32 *r, const u32 *imm) in cond7()
98 static u32 cond6(const u32 *r, const u32 *imm) in cond6()
103 static u32 cond9(const u32 *r, const u32 *imm) in cond9()
109 static u32 cond10(const u32 *r, const u32 *imm) in cond10()
114 static u32 cond4(const u32 *r, const u32 *imm) in cond4()
119 static u32 cond0(const u32 *r, const u32 *imm) in cond0()
124 static u32 cond1(const u32 *r, const u32 *imm) in cond1()
149 static u32 cond8(const u32 *r, const u32 *imm) in cond8()
5909 static u32 qed_cyclic_add(u32 a, u32 b, u32 size) in qed_cyclic_add()
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/dpdk/drivers/net/hinic/
H A Dhinic_pmd_ethdev.h166 u32 rsvd0:16;
177 u32 sip_h:16;
179 u32 sip_l:16;
180 u32 dip_h:16;
182 u32 dip_l:16;
192 u32 rsvd2:16;
195 u32 rsvd0:16;
197 u32 sip_h:16;
201 u32 dip_h:16;
202 u32 sip_l:16;
[all …]
/dpdk/drivers/net/hinic/base/
H A Dhinic_pmd_hwdev.h81 u32 sq_id;
107 u32 rsvd2;
123 u32 rsvd;
193 u32 epc;
232 u32 rsv;
235 u32 pc;
236 u32 lr;
237 u32 cpsr;
241 u32 sp;
254 u32 rsvd;
[all …]
/dpdk/drivers/net/qede/base/
H A Dmcp_public.h67 u32 speed;
94 u32 eee_cfg;
319 u32 flags;
361 u32 entry;
414 u32 pfc;
621 u32 hdr;
1029 u32 lo;
1030 u32 hi;
1035 u32 len;
1196 u32 pf;
[all …]
H A Decore_mcp_api.h68 u32 speed;
132 u32 version;
139 u32 fcs_err;
147 u32 fcs_err;
201 u32 count;
685 u32 *o_mcp_resp, u32 *o_mcp_param);
902 u32 addr, u8 *p_buf, u32 len);
916 u32 addr, u8 *p_buf, u32 len);
962 u32 addr, u8 *p_buf, u32 *p_len);
1075 u32 port, u32 addr, u32 offset,
[all …]
H A Decore_cxt.h39 u32 *vf_cid);
198 u32 iid);
226 u32 count;
232 u32 cid_count;
233 u32 cids_per_vf;
250 u32 reg;
251 u32 val;
257 u32 start_line;
283 u32 start_cid;
284 u32 max_count;
[all …]
/dpdk/drivers/event/dlb2/pf/base/
H A Ddlb2_resource.h252 u32 domain_id,
832 u32 val);
1321 u32 id,
1322 u32 cos,
1323 u32 num);
1599 u32 id,
1612 u32 id,
1668 u32 addr_lo,
1669 u32 data);
1799 u32 id,
[all …]
H A Ddlb2_hw_types.h77 u32 phys_id;
78 u32 virt_id;
84 u32 base;
85 u32 bound;
86 u32 offset;
125 u32 sn_slot;
142 u32 ref_cnt;
194 u32 mode;
197 u32 id;
215 u32 i; in dlb2_sn_group_alloc_slot()
[all …]
/dpdk/drivers/bus/dpaa/include/
H A Dfsl_qman.h199 u32 cmd;
259 u32 val;
300 u32 tag;
502 u32 hi;
503 u32 lo;
505 u32 lo;
506 u32 hi;
1253 u32 key;
1901 int qman_alloc_fqid_range(u32 *result, u32 count, u32 align, int partial);
1953 int qman_alloc_pool_range(u32 *result, u32 count, u32 align, int partial);
[all …]
/dpdk/drivers/bus/dpaa/base/qbman/
H A Ddpaa_alloc.c13 int bman_alloc_bpid_range(u32 *result, u32 count, u32 align, int partial) in bman_alloc_bpid_range()
18 void bman_release_bpid_range(u32 bpid, u32 count) in bman_release_bpid_range()
23 int bman_reserve_bpid_range(u32 bpid, u32 count) in bman_reserve_bpid_range()
28 int qman_alloc_fqid_range(u32 *result, u32 count, u32 align, int partial) in qman_alloc_fqid_range()
33 void qman_release_fqid_range(u32 fqid, u32 count) in qman_release_fqid_range()
43 int qman_alloc_pool_range(u32 *result, u32 count, u32 align, int partial) in qman_alloc_pool_range()
48 void qman_release_pool_range(u32 pool, u32 count) in qman_release_pool_range()
53 int qman_reserve_pool_range(u32 pool, u32 count) in qman_reserve_pool_range()
58 int qman_alloc_cgrid_range(u32 *result, u32 count, u32 align, int partial) in qman_alloc_cgrid_range()
63 void qman_release_cgrid_range(u32 cgrid, u32 count) in qman_release_cgrid_range()
[all …]
/dpdk/drivers/net/ngbe/base/
H A Dngbe_type.h248 s32 (*read32)(struct ngbe_hw *hw, u32 addr, u32 *data);
258 u32 sw_addr;
295 s32 (*set_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);
304 s32 (*set_vlvf)(struct ngbe_hw *hw, u32 vlan, u32 vind,
305 bool vlan_on, u32 *vfta_delta, u32 vfta,
365 u32 addr;
366 u32 id;
377 u32 acks;
378 u32 reqs;
379 u32 rsts;
[all …]
H A Dngbe_hw.h30 u32 *speed,
33 u32 speed,
39 s32 ngbe_set_rar(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
40 u32 enable_addr);
44 u32 mc_addr_count,
59 s32 ngbe_set_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq);
60 s32 ngbe_clear_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq);
64 s32 ngbe_set_vlvf(struct ngbe_hw *hw, u32 vlan, u32 vind,
65 bool vlan_on, u32 *vfta_delta, u32 vfta,
77 s32 ngbe_negotiate_fc(struct ngbe_hw *hw, u32 adv_reg, u32 lp_reg,
[all …]
/dpdk/drivers/net/e1000/base/
H A De1000_vf.h62 u32 data;
99 u32 status;
146 u32 last_gprc;
147 u32 last_gptc;
180 void (*write_vfta)(struct e1000_hw *, u32, u32);
210 u32 msgs_tx;
211 u32 msgs_rx;
213 u32 acks;
214 u32 reqs;
215 u32 rsts;
[all …]
/dpdk/drivers/net/txgbe/base/
H A Dtxgbe_type.h483 s32 (*read32)(struct txgbe_hw *hw, u32 addr, u32 *data);
489 s32 (*write32)(struct txgbe_hw *hw, u32 addr, u32 data);
502 u32 sw_addr;
575 bool vlan_on, u32 *vfta_delta, u32 vfta,
675 u32 addr;
676 u32 id;
721 u32 msgs_tx;
724 u32 acks;
725 u32 reqs;
726 u32 rsts;
[all …]
H A Dtxgbe_hw.h23 s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
24 u32 enable_addr);
47 s32 txgbe_set_vmdq(struct txgbe_hw *hw, u32 rar, u32 vmdq);
48 s32 txgbe_clear_vmdq(struct txgbe_hw *hw, u32 rar, u32 vmdq);
52 s32 txgbe_set_vlvf(struct txgbe_hw *hw, u32 vlan, u32 vind,
53 bool vlan_on, u32 *vfta_delta, u32 vfta,
81 u32 speed,
84 s32 txgbe_negotiate_fc(struct txgbe_hw *hw, u32 adv_reg, u32 lp_reg,
85 u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
96 u32 speed);
[all …]
/dpdk/drivers/net/atlantic/
H A Datl_types.h21 typedef uint32_t u32; typedef
74 u32 idx;
79 u32 idx;
87 u32 pi;
91 u32 idx;
134 u32 caps_lo;
139 u32 mbox_addr;
140 u32 rpc_addr;
141 u32 rpc_tid;
183 u32 *data, u32 len, u32 offset);
[all …]
/dpdk/drivers/net/ixgbe/base/
H A Dixgbe_common.h11 IXGBE_WRITE_REG(hw, reg, (u32) value); \
30 u32 pba_num_size);
68 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
69 u32 enable_addr);
73 u32 mc_addr_count,
102 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
104 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
109 s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
110 bool vlan_on, u32 *vfta_delta, u32 vfta,
133 u32 length, u32 timeout, bool return_data);
[all …]
H A Dixgbe_api.h40 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
42 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
82 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
85 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
87 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
101 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
102 bool vlan_on, u32 *vfta_delta, u32 vfta,
181 u32 device_type, u32 *phy_data);
183 u32 device_type, u32 phy_data);
194 s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
[all …]

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