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Searched refs:regs (Results 1 – 25 of 65) sorted by relevance

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/dpdk/drivers/net/ark/
H A Dark_pktgen.c101 inst->regs->pkt_start_stop = 1; in ark_pktgen_run()
119 inst->regs->pkt_start_stop = 0; in ark_pktgen_pause()
208 return inst->regs->pkts_sent; in ark_pktgen_get_pkts_sent()
215 inst->regs->pkt_payload = b; in ark_pktgen_set_payload_byte()
222 inst->regs->pkt_spacing = x; in ark_pktgen_set_pkt_spacing()
229 inst->regs->pkt_size_min = x; in ark_pktgen_set_pkt_size_min()
236 inst->regs->pkt_size_max = x; in ark_pktgen_set_pkt_size_max()
250 inst->regs->num_pkts = x; in ark_pktgen_set_num_pkts()
273 inst->regs->eth_type = x; in ark_pktgen_set_eth_type()
291 inst->regs->start_offset = x; in ark_pktgen_set_start_offset()
[all …]
H A Dark_pktdir.c24 inst->regs = (struct ark_pkt_dir_regs *)base; in ark_pktdir_init()
25 inst->regs->ctrl = ARK_PKT_DIR_INIT_VAL; /* POR state */ in ark_pktdir_init()
41 inst->regs->ctrl = v; in ark_pktdir_setup()
48 return inst->regs->ctrl; in ark_pktdir_status()
55 return inst->regs->stall_cnt; in ark_pktdir_stall_cnt()
H A Dark_pktdir.h32 volatile struct ark_pkt_dir_regs *regs; member
/dpdk/drivers/dma/ioat/
H A Dioat_dmadev.c100 chanerr = ioat->regs->chanerr; in __ioat_recover()
101 ioat->regs->chanerr = chanerr; in __ioat_recover()
633 if (ioat->regs->chancnt != 1) in ioat_dmadev_create()
635 ioat->regs->chancnt); in ioat_dmadev_create()
640 ioat->regs->chanctrl = 0; in ioat_dmadev_create()
644 if (ioat->regs->chanerr != 0) { in ioat_dmadev_create()
646 ioat->regs->chanerr = val; in ioat_dmadev_create()
654 ioat->regs->chainaddr = 0; in ioat_dmadev_create()
660 ioat->regs->chancmd, in ioat_dmadev_create()
661 ioat->regs->chansts, in ioat_dmadev_create()
[all …]
/dpdk/drivers/net/qede/
H A Dqede_regs.c80 uint32_t *buffer = regs->data; in qede_get_regs()
92 regs->length = qede_get_regs_len(qdev); in qede_get_regs()
93 regs->width = sizeof(uint32_t); in qede_get_regs()
98 memset(buffer, 0, regs->length); in qede_get_regs()
248 struct rte_dev_reg_info regs; in qede_save_fw_dump() local
258 memset(&regs, 0, sizeof(regs)); in qede_save_fw_dump()
260 regs.data = OSAL_ZALLOC(eth_dev, GFP_KERNEL, regs.length); in qede_save_fw_dump()
261 if (regs.data) { in qede_save_fw_dump()
262 qede_get_regs(eth_dev, &regs); in qede_save_fw_dump()
264 rc = qede_write_fwdump(qdev->dump_file, regs.data, regs.length); in qede_save_fw_dump()
[all …]
/dpdk/lib/eal/x86/
H A Drte_hypervisor.c19 cpuid_registers_t regs; in rte_hypervisor_get() local
27 regs[RTE_REG_EAX], regs[RTE_REG_EBX], in rte_hypervisor_get()
28 regs[RTE_REG_ECX], regs[RTE_REG_EDX]); in rte_hypervisor_get()
30 memcpy(name + (reg - 1) * 4, &regs[reg], 4); in rte_hypervisor_get()
H A Drte_cpuflags.c150 cpuid_registers_t regs; in rte_cpu_get_flag_enabled() local
169 regs[RTE_REG_EAX], regs[RTE_REG_EBX], in rte_cpu_get_flag_enabled()
170 regs[RTE_REG_ECX], regs[RTE_REG_EDX]); in rte_cpu_get_flag_enabled()
173 return (regs[feat->reg] >> feat->bit) & 1; in rte_cpu_get_flag_enabled()
/dpdk/drivers/raw/ioat/
H A Dioat_rawdev.c95 ioat->regs->chainaddr = ioat->ring_addr; in ioat_dev_start()
97 ioat->regs->chancmp = ioat->status_addr; in ioat_dev_start()
202 ioat->regs = dev->mem_resource[0].addr; in ioat_rawdev_create()
203 ioat->doorbell = &ioat->regs->dmacount; in ioat_rawdev_create()
210 if (ioat->regs->chancnt != 1) in ioat_rawdev_create()
212 ioat->regs->chancnt); in ioat_rawdev_create()
216 ioat->regs->chanctrl = 0; in ioat_rawdev_create()
224 ioat->regs->chainaddr = 0; in ioat_rawdev_create()
229 ioat->regs->chancmd, in ioat_rawdev_create()
230 ioat->regs->chansts, in ioat_rawdev_create()
[all …]
H A Didxd_pci.c36 err_code = idxd->u.pci->regs->cmdstatus; in idxd_pci_dev_command()
145 pci->regs = dev->mem_resource[0].addr; in init_pci_device()
146 grp_offset = (uint16_t)pci->regs->offsets[0]; in init_pci_device()
148 wq_offset = (uint16_t)(pci->regs->offsets[0] >> 16); in init_pci_device()
151 pci->wq_cfg_sz = (pci->regs->wqcap >> 24) & 0x0F; in init_pci_device()
154 if (pci->regs->gensts & GENSTS_DEV_STATE_MASK) { in init_pci_device()
159 if (pci->regs->cmdstatus & CMDSTATUS_ACTIVE_MASK) { in init_pci_device()
166 nb_groups = (uint8_t)pci->regs->grpcap; in init_pci_device()
167 nb_engines = (uint8_t)pci->regs->engcap; in init_pci_device()
168 nb_wqs = (uint8_t)(pci->regs->wqcap >> 16); in init_pci_device()
[all …]
/dpdk/drivers/net/ngbe/
H A Dngbe_regs_group.h31 ngbe_regs_group_count(const struct reg_info *regs) in ngbe_regs_group_count() argument
36 while (regs[i].count) in ngbe_regs_group_count()
37 count += regs[i++].count; in ngbe_regs_group_count()
43 const struct reg_info *regs) in ngbe_read_regs_group() argument
49 while (regs[i].count) in ngbe_read_regs_group()
50 count += ngbe_read_regs(hw, &regs[i++], &reg_buf[count]); in ngbe_read_regs_group()
/dpdk/drivers/net/txgbe/
H A Dtxgbe_regs_group.h32 txgbe_regs_group_count(const struct reg_info *regs) in txgbe_regs_group_count() argument
37 while (regs[i].count) in txgbe_regs_group_count()
38 count += regs[i++].count; in txgbe_regs_group_count()
44 const struct reg_info *regs) in txgbe_read_regs_group() argument
50 while (regs[i].count) in txgbe_read_regs_group()
51 count += txgbe_read_regs(hw, &regs[i++], &reg_buf[count]); in txgbe_read_regs_group()
H A Dtxgbe_ethdev_vf.c1147 struct rte_dev_reg_info *regs) in txgbevf_get_regs() argument
1150 uint32_t *data = regs->data; in txgbevf_get_regs()
1156 regs->length = txgbevf_get_reg_length(dev); in txgbevf_get_regs()
1157 regs->width = sizeof(uint32_t); in txgbevf_get_regs()
1162 if (regs->length == 0 || in txgbevf_get_regs()
1163 regs->length == (uint32_t)txgbevf_get_reg_length(dev)) { in txgbevf_get_regs()
1164 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | in txgbevf_get_regs()
/dpdk/drivers/dma/idxd/
H A Didxd_pci.c36 err_code = idxd->u.pci->regs->cmdstatus; in idxd_pci_dev_command()
171 pci->regs = dev->mem_resource[0].addr; in init_pci_device()
172 grp_offset = (uint16_t)pci->regs->offsets[0]; in init_pci_device()
174 wq_offset = (uint16_t)(pci->regs->offsets[0] >> 16); in init_pci_device()
177 pci->wq_cfg_sz = (pci->regs->wqcap >> 24) & 0x0F; in init_pci_device()
180 if (pci->regs->gensts & GENSTS_DEV_STATE_MASK) { in init_pci_device()
186 if (pci->regs->cmdstatus & CMDSTATUS_ACTIVE_MASK) { in init_pci_device()
194 nb_groups = (uint8_t)pci->regs->grpcap; in init_pci_device()
195 nb_engines = (uint8_t)pci->regs->engcap; in init_pci_device()
196 nb_wqs = (uint8_t)(pci->regs->wqcap >> 16); in init_pci_device()
[all …]
/dpdk/drivers/raw/ifpga/base/
H A Dopae_spi.c16 opae_writeq(ctrl, dev->regs + NIOS_SPI_CTRL); in nios_spi_indirect_read()
18 stat = opae_readq(dev->regs + NIOS_SPI_STAT); in nios_spi_indirect_read()
20 stat = opae_readq(dev->regs + NIOS_SPI_STAT); in nios_spi_indirect_read()
38 opae_writeq(ctrl, dev->regs + NIOS_SPI_CTRL); in nios_spi_indirect_write()
40 stat = opae_readq(dev->regs + NIOS_SPI_STAT); in nios_spi_indirect_write()
42 stat = opae_readq(dev->regs + NIOS_SPI_STAT); in nios_spi_indirect_write()
52 opae_writeq(value & WRITE_DATA_MASK, dev->regs + SPI_WRITE); in spi_indirect_write()
55 opae_writeq(ctrl, dev->regs + SPI_CTRL); in spi_indirect_write()
67 opae_writeq(ctrl, dev->regs + SPI_CTRL); in spi_indirect_read()
74 tmp = opae_readq(dev->regs + SPI_READ); in spi_indirect_read()
[all …]
H A Dopae_intel_max10.c385 if (!sensor_reg_valid(&info->regs[i])) in max10_add_sensor()
388 ret = max10_sys_read(dev, info->regs[i].regoff, &val); in max10_add_sensor()
402 sensor->value_reg = info->regs[i].regoff; in max10_add_sensor()
500 raw->regs[i].regoff = start; in max10_sensor_init()
502 raw->regs[i].regoff = start - in max10_sensor_init()
504 raw->regs[i].size = size; in max10_sensor_init()
523 i, raw->regs[i].regoff, in max10_sensor_init()
524 raw->regs[i].size); in max10_sensor_init()
/dpdk/drivers/bus/dpaa/base/fman/
H A Dfman_hw.c219 struct memac_regs *regs = m->ccsr_map; in fman_if_stats_get() local
223 ((u64)in_be32(&regs->rfrm_u)) << 32; in fman_if_stats_get()
225 ((u64)in_be32(&regs->roct_u)) << 32; in fman_if_stats_get()
227 ((u64)in_be32(&regs->rerr_u)) << 32; in fman_if_stats_get()
231 ((u64)in_be32(&regs->tfrm_u)) << 32; in fman_if_stats_get()
233 ((u64)in_be32(&regs->toct_u)) << 32; in fman_if_stats_get()
235 ((u64)in_be32(&regs->terr_u)) << 32; in fman_if_stats_get()
242 struct memac_regs *regs = m->ccsr_map; in fman_if_stats_get_all() local
256 struct memac_regs *regs = m->ccsr_map; in fman_if_stats_reset() local
259 tmp = in_be32(&regs->statn_config); in fman_if_stats_reset()
[all …]
/dpdk/drivers/net/e1000/
H A Digb_regs.h171 igb_reg_group_count(const struct reg_info *regs) in igb_reg_group_count() argument
176 while (regs[i].count) in igb_reg_group_count()
177 count += regs[i++].count; in igb_reg_group_count()
183 const struct reg_info *regs) in igb_read_regs_group() argument
189 while (regs[i].count) in igb_read_regs_group()
190 count += igb_read_regs(hw, &regs[i++], &reg_buf[count]); in igb_read_regs_group()
/dpdk/drivers/bus/fslmc/mc/
H A Dmc_sys.c59 if (!mc_io || !mc_io->regs) in mc_send_command()
65 mc_write_command(mc_io->regs, cmd); in mc_send_command()
69 response = ioread64(mc_io->regs); in mc_send_command()
78 mc_read_response(mc_io->regs, cmd); in mc_send_command()
H A Dfsl_mc_sys.h17 void *regs; member
57 void *regs; member
/dpdk/drivers/net/ixgbe/
H A Dixgbe_regs.h324 ixgbe_regs_group_count(const struct reg_info *regs) in ixgbe_regs_group_count() argument
329 while (regs[i].count) in ixgbe_regs_group_count()
330 count += regs[i++].count; in ixgbe_regs_group_count()
336 const struct reg_info *regs) in ixgbe_read_regs_group() argument
342 while (regs[i].count) in ixgbe_read_regs_group()
343 count += ixgbe_read_regs(hw, &regs[i++], &reg_buf[count]); in ixgbe_read_regs_group()
/dpdk/lib/eal/ppc/
H A Drte_cpuflags.c92 hwcap_registers_t regs = {0}; in rte_cpu_get_flag_enabled() local
101 rte_cpu_get_features(regs); in rte_cpu_get_flag_enabled()
102 return (regs[feat->reg] >> feat->bit) & 1; in rte_cpu_get_flag_enabled()
/dpdk/drivers/net/hns3/
H A Dhns3_regs.c476 hns3_get_regs(struct rte_eth_dev *eth_dev, struct rte_dev_reg_info *regs) in hns3_get_regs() argument
491 data = regs->data; in hns3_get_regs()
493 regs->length = length; in hns3_get_regs()
494 regs->width = sizeof(uint32_t); in hns3_get_regs()
499 if (regs->length && regs->length != length) in hns3_get_regs()
502 regs->version = hw->fw_version; in hns3_get_regs()
/dpdk/lib/eal/arm/
H A Drte_cpuflags.c141 hwcap_registers_t regs = {0}; in rte_cpu_get_flag_enabled() local
150 rte_cpu_get_features(regs); in rte_cpu_get_flag_enabled()
151 return (regs[feat->reg] >> feat->bit) & 1; in rte_cpu_get_flag_enabled()
/dpdk/drivers/net/cxgbe/
H A Dcxgbevf_ethdev.c151 adapter->regs = (void *)pci_dev->mem_resource[0].addr; in eth_cxgbevf_dev_init()
152 if (!adapter->regs) { in eth_cxgbevf_dev_init()
/dpdk/examples/ethtool/lib/
H A Drte_ethtool.c104 rte_ethtool_get_regs(uint16_t port_id, struct ethtool_regs *regs, void *data) in rte_ethtool_get_regs() argument
109 if (regs == NULL || data == NULL) in rte_ethtool_get_regs()
118 regs->version = reg_info.version; in rte_ethtool_get_regs()

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