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Searched refs:reg_off (Results 1 – 12 of 12) sorted by relevance

/dpdk/drivers/net/liquidio/base/
H A Dlio_hw_defs.h177 #define lio_write_csr(lio_dev, reg_off, value) \ argument
180 typeof(reg_off) _reg_off = reg_off; \
192 typeof(reg_off) _reg_off = reg_off; \
202 #define lio_read_csr(lio_dev, reg_off) \ argument
205 typeof(reg_off) _reg_off = reg_off; \
214 #define lio_read_csr64(lio_dev, reg_off) \ argument
217 typeof(reg_off) _reg_off = reg_off; \
233 #define lio_read_csr(lio_dev, reg_off) \ argument
234 rte_read32((lio_dev)->hw_addr + (reg_off))
236 #define lio_read_csr64(lio_dev, reg_off) \ argument
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/dpdk/drivers/raw/ntb/
H A Dntb_hw_intel.c278 uint16_t reg_val, reg_off; in intel_ntb_get_link_status() local
287 reg_off = XEON_GEN3_LINK_STATUS_OFFSET; in intel_ntb_get_link_status()
289 sizeof(reg_val), reg_off); in intel_ntb_get_link_status()
318 uint32_t ntb_ctrl, reg_off; in intel_ntb_gen3_set_link() local
321 reg_off = XEON_NTBCNTL_OFFSET; in intel_ntb_gen3_set_link()
322 reg_addr = hw->hw_addr + reg_off; in intel_ntb_gen3_set_link()
408 uint32_t spad_v, reg_off; in intel_ntb_spad_read() local
438 uint32_t reg_off; in intel_ntb_spad_write() local
540 uint8_t reg_off; in intel_ntb_vector_bind() local
550 reg_off = XEON_GEN3_INTVEC_OFFSET; in intel_ntb_vector_bind()
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/dpdk/app/test-pmd/
H A Dtestpmd.h780 port_pci_reg_read(struct rte_port *port, uint32_t reg_off) in port_pci_reg_read() argument
800 reg_addr = ((char *)pci_dev->mem_resource[0].addr + reg_off); in port_pci_reg_read()
805 #define port_id_pci_reg_read(pt_id, reg_off) \ argument
806 port_pci_reg_read(&ports[(pt_id)], (reg_off))
828 reg_addr = ((char *)pci_dev->mem_resource[0].addr + reg_off); in port_pci_reg_write()
832 #define port_id_pci_reg_write(pt_id, reg_off, reg_value) \ argument
833 port_pci_reg_write(&ports[(pt_id)], (reg_off), (reg_value))
899 void port_reg_bit_field_display(portid_t port_id, uint32_t reg_off,
901 void port_reg_bit_field_set(portid_t port_id, uint32_t reg_off,
903 void port_reg_display(portid_t port_id, uint32_t reg_off);
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H A Dconfig.c1070 if (reg_off & 0x3) { in port_reg_off_is_invalid()
1073 (unsigned int)reg_off); in port_reg_off_is_invalid()
1091 if (reg_off >= pci_len) { in port_reg_off_is_invalid()
1094 port_id, (unsigned int)reg_off, (unsigned int)reg_off, in port_reg_off_is_invalid()
1128 if (port_reg_off_is_invalid(port_id, reg_off)) in port_reg_bit_display()
1132 reg_v = port_id_pci_reg_read(port_id, reg_off); in port_reg_bit_display()
1147 if (port_reg_off_is_invalid(port_id, reg_off)) in port_reg_bit_field_display()
1174 if (port_reg_off_is_invalid(port_id, reg_off)) in port_reg_display()
1188 if (port_reg_off_is_invalid(port_id, reg_off)) in port_reg_bit_set()
1217 if (port_reg_off_is_invalid(port_id, reg_off)) in port_reg_bit_field_set()
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H A Dcmdline.c8534 uint32_t reg_off; member
8543 port_reg_display(res->port_id, res->reg_off); in cmd_read_reg_parsed()
8573 uint32_t reg_off; member
8584 port_reg_bit_field_display(res->port_id, res->reg_off, in cmd_read_reg_bit_field_parsed()
8628 uint32_t reg_off; member
8650 TOKEN_NUM_INITIALIZER(struct cmd_read_reg_bit_result, reg_off,
8675 uint32_t reg_off; member
8685 port_reg_set(res->port_id, res->reg_off, res->value); in cmd_write_reg_parsed()
8718 uint32_t reg_off; member
8730 port_reg_bit_field_set(res->port_id, res->reg_off, in cmd_write_reg_bit_field_parsed()
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/dpdk/drivers/net/octeontx/base/
H A Docteontx_pkovf.c77 unsigned int reg_off; in octeontx_pko_dq_open() local
99 reg_off = PKO_VF_DQ_OP_OPEN(gdq); in octeontx_pko_dq_open()
101 rtn = octeontx_reg_ldadd_u64(vf_bar0 + reg_off, 0); in octeontx_pko_dq_open()
128 unsigned int reg_off; in octeontx_pko_dq_close() local
139 reg_off = PKO_VF_DQ_OP_CLOSE(res); in octeontx_pko_dq_close()
141 rtn = octeontx_reg_ldadd_u64(vf_bar0 + reg_off, 0); in octeontx_pko_dq_close()
/dpdk/drivers/event/octeontx/
H A Dssovf_worker.c209 uint32_t reg_off; in ssows_flush_events() local
220 reg_off = SSOW_VHWS_OP_GET_WORK0; in ssows_flush_events()
221 reg_off |= 1 << 17; /* Grouped */ in ssows_flush_events()
222 reg_off |= 1 << 16; /* WAIT */ in ssows_flush_events()
223 reg_off |= queue_id << 4; /* INDEX_GGRP_MASK(group number) */ in ssows_flush_events()
230 ssovf_load_pair(get_work0, get_work1, ws->base + reg_off); in ssows_flush_events()
H A Dssovf_evdev.c239 uint32_t reg_off; in ssovf_port_setup() local
268 reg_off = SSOW_VHWS_OP_GET_WORK0; in ssovf_port_setup()
269 reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */ in ssovf_port_setup()
270 reg_off |= 1 << 16; /* Wait */ in ssovf_port_setup()
271 ws->getwork = ws->base + reg_off; in ssovf_port_setup()
/dpdk/drivers/net/octeontx_ep/
H A Dotx_ep_common.h87 #define otx_ep_write64(value, base_addr, reg_off) \ argument
90 typeof(reg_off) off = (reg_off); \
/dpdk/drivers/net/e1000/
H A Digb_ethdev.c3912 uint32_t reg_off; in igb_inject_flex_filter() local
3917 reg_off = E1000_FHFT(filter->index); in igb_inject_flex_filter()
3931 E1000_WRITE_REG(hw, reg_off, in igb_inject_flex_filter()
3933 reg_off += sizeof(uint32_t); in igb_inject_flex_filter()
3934 E1000_WRITE_REG(hw, reg_off, in igb_inject_flex_filter()
3936 reg_off += sizeof(uint32_t); in igb_inject_flex_filter()
3937 E1000_WRITE_REG(hw, reg_off, in igb_inject_flex_filter()
3939 reg_off += sizeof(uint32_t) * 2; in igb_inject_flex_filter()
3972 uint32_t reg_off; in igb_remove_flex_filter() local
3976 reg_off = E1000_FHFT(filter->index); in igb_remove_flex_filter()
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/dpdk/drivers/net/ena/base/ena_defs/
H A Dena_admin_defs.h1098 uint16_t reg_off; member
/dpdk/drivers/net/ena/base/
H A Dena_com.c865 read_resp->reg_off); in ena_com_reg_bar_read32()
870 if (read_resp->reg_off != offset) { in ena_com_reg_bar_read32()