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Searched refs:q_idx (Results 1 – 15 of 15) sorted by relevance

/dpdk/drivers/baseband/fpga_5gnr_fec/
H A Drte_fpga_5gnr_fec.c396 uint64_t q_idx; in fpga_find_free_queue_idx() local
406 q_idx = 1ULL << i; in fpga_find_free_queue_idx()
408 if (d->q_bound_bit_map & q_idx) in fpga_find_free_queue_idx()
411 d->q_assigned_bit_map |= q_idx; in fpga_find_free_queue_idx()
428 int8_t q_idx; in fpga_queue_setup() local
432 if (q_idx == -1) in fpga_queue_setup()
446 q->q_idx = q_idx; in fpga_queue_setup()
523 queue_id, q_idx); in fpga_queue_setup()
651 if (q != NULL && q->q_idx == q_idx) in get_queue_id()
666 uint64_t q_idx; in fpga_dev_interrupt_handler() local
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H A Dfpga_5gnr_fec.h268 uint8_t q_idx; /* Queue index */ member
/dpdk/drivers/baseband/fpga_lte_fec/
H A Dfpga_lte_fec.c261 uint8_t q_idx; /* Queue index */ member
668 uint64_t q_idx; in fpga_find_free_queue_idx() local
678 q_idx = 1ULL << i; in fpga_find_free_queue_idx()
680 if (d->q_bound_bit_map & q_idx) in fpga_find_free_queue_idx()
700 int8_t q_idx; in fpga_queue_setup() local
704 if (q_idx == -1) in fpga_queue_setup()
718 q->q_idx = q_idx; in fpga_queue_setup()
795 queue_id, q_idx); in fpga_queue_setup()
922 if (q != NULL && q->q_idx == q_idx) in get_queue_id()
937 uint64_t q_idx; in fpga_dev_interrupt_handler() local
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/dpdk/drivers/net/fm10k/base/
H A Dfm10k_pf.c538 u16 vsi, queue, pc, q_idx; in fm10k_configure_dglort_map_pf() local
555 q_idx = dglort->queue_b; in fm10k_configure_dglort_map_pf()
559 for (queue = 0; queue < queue_count; queue++, q_idx++) { in fm10k_configure_dglort_map_pf()
560 if (q_idx >= FM10K_MAX_QUEUES) in fm10k_configure_dglort_map_pf()
563 FM10K_WRITE_REG(hw, FM10K_TX_SGLORT(q_idx), glort); in fm10k_configure_dglort_map_pf()
564 FM10K_WRITE_REG(hw, FM10K_RX_SGLORT(q_idx), glort); in fm10k_configure_dglort_map_pf()
574 q_idx = pc + dglort->queue_b; in fm10k_configure_dglort_map_pf()
576 if (q_idx >= FM10K_MAX_QUEUES) in fm10k_configure_dglort_map_pf()
579 txqctl = FM10K_READ_REG(hw, FM10K_TXQCTL(q_idx)); in fm10k_configure_dglort_map_pf()
582 FM10K_WRITE_REG(hw, FM10K_TXQCTL(q_idx), txqctl); in fm10k_configure_dglort_map_pf()
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/dpdk/drivers/net/txgbe/
H A Dtxgbe_ethdev_vf.c979 uint32_t q_idx; in txgbevf_configure_msix() local
998 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) { in txgbevf_configure_msix()
1002 txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx); in txgbevf_configure_msix()
1003 rte_intr_vec_list_index_set(intr_handle, q_idx, in txgbevf_configure_msix()
/dpdk/drivers/net/igc/
H A Digc_txrx.c882 uint16_t q_idx, reta_idx; in igc_rss_configure() local
884 q_idx = (uint8_t)((dev->data->nb_rx_queues > 1) ? in igc_rss_configure()
887 reta.bytes[reta_idx] = q_idx; in igc_rss_configure()
998 uint16_t q_idx, reta_idx; in igc_add_rss_filter() local
1002 q_idx = rss->conf.queue[j]; in igc_add_rss_filter()
1004 reta.bytes[reta_idx] = q_idx; in igc_add_rss_filter()
/dpdk/drivers/net/e1000/
H A Digb_rxtx.c2072 uint8_t q_idx; in igb_rss_configure() local
2074 q_idx = (uint8_t) ((dev->data->nb_rx_queues > 1) ? in igb_rss_configure()
2076 reta.bytes[i & 3] = (uint8_t) (q_idx << shift); in igb_rss_configure()
2930 uint8_t q_idx; in igb_config_rss_filter() local
2934 q_idx = conf->conf.queue[j]; in igb_config_rss_filter()
2935 reta.bytes[i & 3] = (uint8_t)(q_idx << shift); in igb_config_rss_filter()
/dpdk/drivers/net/igc/base/
H A Digc_defines.h1493 #define IGC_VLAPQF_QUEUE_SEL(_n, q_idx) ((q_idx) << ((_n) * 4)) argument
/dpdk/drivers/net/liquidio/
H A Dlio_ethdev.c1085 uint8_t q_idx, conf_idx, reta_idx; in lio_dev_rss_configure() local
1087 q_idx = (uint8_t)((eth_dev->data->nb_rx_queues > 1) ? in lio_dev_rss_configure()
1091 reta_conf[conf_idx].reta[reta_idx] = q_idx; in lio_dev_rss_configure()
/dpdk/drivers/net/i40e/
H A Di40e_ethdev.h1300 int i40e_switch_rx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on);
1301 int i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on);
H A Di40e_ethdev.c6260 i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on) in i40e_switch_tx_queue() argument
6269 i40e_pre_tx_queue_cfg(hw, q_idx, on); in i40e_switch_tx_queue()
6275 reg = I40E_READ_REG(hw, I40E_QTX_ENA(q_idx)); in i40e_switch_tx_queue()
6286 I40E_WRITE_REG(hw, I40E_QTX_HEAD(q_idx), 0); in i40e_switch_tx_queue()
6294 I40E_WRITE_REG(hw, I40E_QTX_ENA(q_idx), reg); in i40e_switch_tx_queue()
6298 reg = I40E_READ_REG(hw, I40E_QTX_ENA(q_idx)); in i40e_switch_tx_queue()
6312 (on ? "enable" : "disable"), q_idx); in i40e_switch_tx_queue()
6328 reg = I40E_READ_REG(hw, I40E_QRX_ENA(q_idx)); in i40e_switch_rx_queue()
6345 I40E_WRITE_REG(hw, I40E_QRX_ENA(q_idx), reg); in i40e_switch_rx_queue()
6349 reg = I40E_READ_REG(hw, I40E_QRX_ENA(q_idx)); in i40e_switch_rx_queue()
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/dpdk/drivers/net/ice/
H A Dice_rxtx.c463 ice_switch_rx_queue(struct ice_hw *hw, uint16_t q_idx, bool on) in ice_switch_rx_queue() argument
469 reg = ICE_READ_REG(hw, QRX_CTRL(q_idx)); in ice_switch_rx_queue()
482 ICE_WRITE_REG(hw, QRX_CTRL(q_idx), reg); in ice_switch_rx_queue()
489 reg = ICE_READ_REG(hw, QRX_CTRL(q_idx)); in ice_switch_rx_queue()
504 (on ? "enable" : "disable"), q_idx); in ice_switch_rx_queue()
/dpdk/drivers/baseband/acc100/
H A Drte_acc100_pmd.c825 int16_t q_idx; in acc100_queue_setup() local
915 q_idx = acc100_find_free_queue_idx(dev, conf); in acc100_queue_setup()
916 if (q_idx == -1) { in acc100_queue_setup()
923 q->qgrp_id = (q_idx >> ACC100_GRP_ID_SHIFT) & 0xF; in acc100_queue_setup()
924 q->vf_id = (q_idx >> ACC100_VF_ID_SHIFT) & 0x3F; in acc100_queue_setup()
925 q->aq_id = q_idx & 0xF; in acc100_queue_setup()
/dpdk/drivers/net/qede/base/
H A Decore_sriov.c3164 u16 i, q_idx; in ecore_iov_vp_update_rss_param() local
3201 q_idx = p_rss_tlv->rss_ind_table[i]; in ecore_iov_vp_update_rss_param()
3202 if (!ecore_iov_validate_rxq(p_hwfn, vf, q_idx, in ecore_iov_vp_update_rss_param()
3206 vf->relative_vf_id, q_idx); in ecore_iov_vp_update_rss_param()
3211 p_cid = ecore_iov_get_vf_rx_queue_cid(&vf->vf_queues[q_idx]); in ecore_iov_vp_update_rss_param()
/dpdk/drivers/net/ixgbe/
H A Dixgbe_ethdev.c5928 uint32_t q_idx; in ixgbevf_configure_msix() local
5947 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) { in ixgbevf_configure_msix()
5951 ixgbevf_set_ivar_map(hw, 0, q_idx, vector_idx); in ixgbevf_configure_msix()
5952 rte_intr_vec_list_index_set(intr_handle, q_idx, in ixgbevf_configure_msix()