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Searched refs:pins (Results 1 – 4 of 4) sorted by relevance

/dpdk/drivers/net/ice/
H A Dice_ethdev.c1914 while (isblank(*pins)) in parse_pps_out_parameter()
1915 pins++; in parse_pps_out_parameter()
1917 pins++; in parse_pps_out_parameter()
1919 pins++; in parse_pps_out_parameter()
1920 if (*pins == '\0') in parse_pps_out_parameter()
1936 pins += idx; in parse_pps_out_parameter()
1938 pins += strcspn(pins, ":"); in parse_pps_out_parameter()
1939 if (*pins++ != ':') in parse_pps_out_parameter()
1942 pins++; in parse_pps_out_parameter()
1944 pin_start = pins; in parse_pps_out_parameter()
[all …]
/dpdk/drivers/net/bnx2x/
H A Delink.h43 uint8_t pins,
H A Dbnx2x.c678 bnx2x_gpio_mult_write(struct bnx2x_softc *sc, uint8_t pins, uint32_t mode) in bnx2x_gpio_mult_write() argument
688 gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_FLOAT_POS); in bnx2x_gpio_mult_write()
689 gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_CLR_POS); in bnx2x_gpio_mult_write()
690 gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_SET_POS); in bnx2x_gpio_mult_write()
695 gpio_reg |= (pins << MISC_REGISTERS_GPIO_CLR_POS); in bnx2x_gpio_mult_write()
700 gpio_reg |= (pins << MISC_REGISTERS_GPIO_SET_POS); in bnx2x_gpio_mult_write()
705 gpio_reg |= (pins << MISC_REGISTERS_GPIO_FLOAT_POS); in bnx2x_gpio_mult_write()
781 elink_cb_gpio_mult_write(struct bnx2x_softc * sc, uint8_t pins, in elink_cb_gpio_mult_write() argument
784 return bnx2x_gpio_mult_write(sc, pins, mode); in elink_cb_gpio_mult_write()
/dpdk/doc/guides/prog_guide/
H A Denv_abstraction_layer.rst638 DPDK usually pins one pthread per core to avoid the overhead of task switching.