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/dpdk/drivers/net/qede/
H A Dqede_debug.c1060 offset += qed_dump_align(char_buf + offset, dump, offset); in qed_dump_str_param()
1083 offset += qed_dump_align(char_buf + offset, dump, offset); in qed_dump_num_param()
1086 offset = BYTES_TO_DWORDS(offset); in qed_dump_num_param()
1128 offset += qed_dump_str_param(dump_buf + offset, in qed_dump_fw_ver_param()
1130 offset += qed_dump_str_param(dump_buf + offset, in qed_dump_fw_ver_param()
1132 offset += qed_dump_num_param(dump_buf + offset, in qed_dump_fw_ver_param()
1250 offset += qed_dump_num_param(dump_buf + offset, in qed_dump_common_global_params()
1252 offset += qed_dump_str_param(dump_buf + offset, in qed_dump_common_global_params()
1256 offset += qed_dump_str_param(dump_buf + offset, in qed_dump_common_global_params()
6006 offset += (4 - (offset & 0x3)); in qed_read_param()
[all …]
H A Dqede_regs.c86 uint32_t offset = 0; in qede_get_regs() local
113 offset + REGDUMP_HEADER_SIZE, &feature_size); in qede_get_regs()
114 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
123 offset + REGDUMP_HEADER_SIZE, &feature_size); in qede_get_regs()
124 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
134 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
144 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
155 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
165 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
175 *(uint32_t *)((uint8_t *)buffer + offset) = in qede_get_regs()
[all …]
/dpdk/lib/eal/common/
H A Deal_common_trace_ctf.c34 int count = *offset; in meta_copy()
50 *offset = count; in meta_copy()
100 return meta_copy(meta, offset, str, rc); in meta_data_type_emit()
133 return meta_copy(meta, offset, str, rc); in meta_header_emit()
137 meta_env_emit(char **meta, int *offset) in meta_env_emit() argument
247 int rc, offset = 0; in trace_metadata_create() local
254 rc = meta_header_emit(&meta, &offset); in trace_metadata_create()
258 rc = meta_env_emit(&meta, &offset); in trace_metadata_create()
265 trace->ctf_meta_offset_freq = offset; in trace_metadata_create()
281 rc = meta_stream_emit(&meta, &offset); in trace_metadata_create()
[all …]
/dpdk/drivers/bus/fslmc/qbman/
H A Dqbman_sys.h194 uint32_t offset) in qbman_cinh_write_start_wo_shadow() argument
200 QBMAN_BUG_ON(offset & 63); in qbman_cinh_write_start_wo_shadow()
216 offset + loop * 4); in qbman_cinh_write_complete()
232 uint32_t offset) in qbman_cinh_read_shadow() argument
251 uint32_t offset) in qbman_cinh_read_wo_shadow() argument
261 uint32_t offset) in qbman_cena_write_start() argument
302 offset + loop * 4); in qbman_cena_write_complete()
308 offset + loop * 4); in qbman_cena_write_complete()
326 uint32_t offset) in qbman_cena_read_reg() argument
366 uint32_t offset) in qbman_cena_invalidate() argument
[all …]
/dpdk/lib/port/
H A Drte_port.h28 #define RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset) \ argument
29 (&((uint8_t *)(mbuf))[offset])
30 #define RTE_MBUF_METADATA_UINT16_PTR(mbuf, offset) \ argument
31 ((uint16_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
32 #define RTE_MBUF_METADATA_UINT32_PTR(mbuf, offset) \ argument
33 ((uint32_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
35 ((uint64_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
38 (*RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
40 (*RTE_MBUF_METADATA_UINT16_PTR(mbuf, offset))
42 (*RTE_MBUF_METADATA_UINT32_PTR(mbuf, offset))
[all …]
/dpdk/drivers/net/igc/base/
H A Digc_phy.h9 s32 igc_null_read_reg(struct igc_hw *hw, u32 offset, u16 *data);
12 s32 igc_null_write_reg(struct igc_hw *hw, u32 offset, u16 data);
46 s32 igc_read_phy_reg_igp(struct igc_hw *hw, u32 offset, u16 *data);
48 s32 igc_read_phy_reg_m88(struct igc_hw *hw, u32 offset, u16 *data);
53 s32 igc_write_phy_reg_igp(struct igc_hw *hw, u32 offset, u16 data);
61 s32 igc_write_phy_reg_bm(struct igc_hw *hw, u32 offset, u16 data);
62 s32 igc_read_phy_reg_bm(struct igc_hw *hw, u32 offset, u16 *data);
163 #define BM_PHY_REG_PAGE(offset) \ argument
164 ((u16)(((offset) >> PHY_PAGE_SHIFT) & 0xFFFF))
166 #define BM_PHY_REG_NUM(offset) ( \ argument
[all …]
H A Digc_phy.c308 offset, in igc_read_phy_reg_mdic()
374 offset, in igc_write_phy_reg_mdic()
600 i2ccmd = ((offset << in igc_write_sfp_data_byte()
731 (u16)offset); in __igc_read_phy_reg_igp()
800 (u16)offset); in __igc_write_phy_reg_igp()
803 offset, in __igc_write_phy_reg_igp()
2255 u16 data, offset, mask; in igc_check_polarity_igp() local
4083 offset = offset & GS40G_OFFSET_MASK; in igc_write_phy_reg_gs40g()
4115 offset = offset & GS40G_OFFSET_MASK; in igc_read_phy_reg_gs40g()
4146 offset = offset & GPY_REG_MASK; in igc_write_phy_reg_gpy()
[all …]
/dpdk/drivers/common/sfc_efx/base/
H A Defx_vpd.c456 offset = 0; in efx_vpd_hunk_length()
462 offset += taglen; in efx_vpd_hunk_length()
467 *lengthp = offset; in efx_vpd_hunk_length()
498 offset = 0; in efx_vpd_hunk_verify()
535 offset += taglen; in efx_vpd_hunk_verify()
616 offset++; in efx_vpd_hunk_reinit()
683 offset += taglen; in efx_vpd_hunk_next()
722 offset = 0; in efx_vpd_hunk_get()
753 offset += taglen; in efx_vpd_hunk_get()
818 offset = 0; in efx_vpd_hunk_set()
[all …]
H A Def10_image.c77 uint32_t offset; in efx_asn1_parse_header_match_tag() local
96 for (offset = 2; offset < cursor->hdr_size; offset++) { in efx_asn1_parse_header_match_tag()
607 uint32_t offset; in efx_build_signed_image_write_buffer() member
633 cms_header.offset = 0; in efx_build_signed_image_write_buffer()
642 image_header.offset = cms_header.offset + cms_header.size; in efx_build_signed_image_write_buffer()
650 code.offset = image_header.offset + image_header.size; in efx_build_signed_image_write_buffer()
658 image_trailer.offset = code.offset + code.size; in efx_build_signed_image_write_buffer()
666 signature.offset = image_trailer.offset + image_trailer.size; in efx_build_signed_image_write_buffer()
753 memcpy(bufferp + chunk_hdr.offset, in efx_build_signed_image_write_buffer()
795 chunk_hdr.offset = 0; in efx_build_signed_image_write_buffer()
[all …]
/dpdk/drivers/net/e1000/base/
H A De1000_phy.h9 s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);
12 s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);
46 s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
48 s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
61 s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
62 s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
139 #define BM_PHY_REG_PAGE(offset) \ argument
140 ((u16)(((offset) >> PHY_PAGE_SHIFT) & 0xFFFF))
141 #define BM_PHY_REG_NUM(offset) \ argument
142 ((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\
[all …]
H A De1000_phy.c309 offset, in e1000_read_phy_reg_mdic()
375 offset, in e1000_write_phy_reg_mdic()
601 i2ccmd = ((offset << in e1000_write_sfp_data_byte()
732 (u16)offset); in __e1000_read_phy_reg_igp()
801 (u16)offset); in __e1000_write_phy_reg_igp()
804 offset, in __e1000_write_phy_reg_igp()
2148 u16 phy_data, offset, mask; in e1000_check_downshift_generic() local
2220 u16 data, offset, mask; in e1000_check_polarity_igp() local
2263 u16 phy_data, offset, mask; in e1000_check_polarity_ife() local
4039 offset = offset & GS40G_OFFSET_MASK; in e1000_write_phy_reg_gs40g()
[all …]
/dpdk/drivers/common/dpaax/caamflib/rta/
H A Dload_cmd.h156 if ((length > 3) || (offset)) in load_check_len_offset()
160 if ((length != 4) || (offset != 0)) in load_check_len_offset()
165 ((length == 8) && (offset == 0)))) in load_check_len_offset()
171 ((length == 8) && (offset == 0)))) in load_check_len_offset()
179 if ((length > 32) || (offset > 32) || ((offset + length) > 32)) in load_check_len_offset()
183 if ((length > 24) || (offset > 24) || ((offset + length) > 24)) in load_check_len_offset()
187 if ((length > 16) || (offset > 16) || ((offset + length) > 16)) in load_check_len_offset()
191 if ((length > 8) || (offset > 8) || ((offset + length) > 8)) in load_check_len_offset()
195 if ((length > 128) || (offset > 128) || in load_check_len_offset()
196 ((offset + length) > 128)) in load_check_len_offset()
[all …]
H A Dmove_cmd.h123 &offset, &opt); in rta_move()
138 offset = src_offset; in rta_move()
140 offset = dst_offset; in rta_move()
240 *offset = dst_offset; in set_move_offset()
266 *offset = src_offset; in set_move_offset()
285 *offset = dst_offset; in set_move_offset()
307 *offset = src_offset; in set_move_offset()
321 *offset = src_offset; in set_move_offset()
324 *offset = src_offset; in set_move_offset()
326 *offset = dst_offset; in set_move_offset()
[all …]
/dpdk/drivers/baseband/fpga_5gnr_fec/
H A Dfpga_5gnr_fec.h299 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_8()
307 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_16()
315 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_32()
323 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_64()
351 fpga_reg_read_32(void *mmio_base, uint32_t offset) in fpga_reg_read_32() argument
353 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_read_32()
362 fpga_reg_read_16(void *mmio_base, uint32_t offset) in fpga_reg_read_16() argument
364 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_read_16()
373 fpga_reg_read_8(void *mmio_base, uint32_t offset) in fpga_reg_read_8() argument
375 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_read_8()
[all …]
/dpdk/lib/hash/
H A Drte_thash.c549 uint32_t offset) in rte_thash_add_helper() argument
569 offset; in rte_thash_add_helper()
578 ent->offset = start; in rte_thash_add_helper()
678 if (offset % CHAR_BIT) { in read_unaligned_byte()
699 offset); in read_unaligned_bits()
700 offset += CHAR_BIT; in read_unaligned_bits()
713 offset %= CHAR_BIT; in get_bits_mask()
731 if (((offset + len) / CHAR_BIT) != (offset / CHAR_BIT)) { in write_unaligned_byte()
771 int offset; in rte_thash_adjust_tuple() local
813 offset -= tmp_len; in rte_thash_adjust_tuple()
[all …]
/dpdk/drivers/net/i40e/base/
H A Di40e_dcb.c42 u16 offset = 0; in i40e_parse_ieee_etscfg_tlv() local
62 offset++; in i40e_parse_ieee_etscfg_tlv()
79 offset++; in i40e_parse_ieee_etscfg_tlv()
117 offset++; in i40e_parse_ieee_etsrec_tlv()
134 offset++; in i40e_parse_ieee_etsrec_tlv()
208 offset++; in i40e_parse_ieee_app_tlv()
309 offset++; in i40e_parse_cee_pgcfg_tlv()
1022 offset++; in i40e_add_ieee_ets_tlv()
1037 offset++; in i40e_add_ieee_ets_tlv()
1086 offset++; in i40e_add_ieee_etsrec_tlv()
[all …]
H A Di40e_nvm.c179 u16 offset, in i40e_read_nvm_word_srctl() argument
215 offset); in i40e_read_nvm_word_srctl()
264 offset, words); in i40e_read_nvm_aq()
307 u16 offset, in __i40e_read_nvm_word() argument
358 u16 offset = 0; in i40e_read_nvm_module_data() local
434 index = offset + word; in i40e_read_nvm_buffer_srctl()
494 offset += read_size; in i40e_read_nvm_buffer_aq()
516 u16 offset, in __i40e_read_nvm_buffer() argument
1547 if (cmd->offset) in i40e_nvmupd_exec_aq()
1563 if (cmd->offset) { in i40e_nvmupd_exec_aq()
[all …]
/dpdk/drivers/common/cnxk/
H A Droc_npc_mcam_dump.c149 offset += 4; in npc_flow_print_parse_nibbles()
155 offset += 8; in npc_flow_print_parse_nibbles()
161 offset += 4; in npc_flow_print_parse_nibbles()
167 offset += 8; in npc_flow_print_parse_nibbles()
174 offset += 4; in npc_flow_print_parse_nibbles()
180 offset += 8; in npc_flow_print_parse_nibbles()
187 offset += 4; in npc_flow_print_parse_nibbles()
193 offset += 8; in npc_flow_print_parse_nibbles()
200 offset += 4; in npc_flow_print_parse_nibbles()
206 offset += 8; in npc_flow_print_parse_nibbles()
[all …]
/dpdk/drivers/net/ice/base/
H A Dice_nvm.c113 offset += read_size; in ice_read_flat_nvm()
234 u32 offset, size; in ice_get_flash_bank_offset() local
680 u32 offset; in ice_get_orom_civd_data() local
687 for (offset = 0; (offset + 512) <= hw->flash.banks.orom_size; offset += 512) { in ice_get_orom_civd_data()
799 max_size = offset; in ice_discover_flash_size()
803 min_size = offset; in ice_discover_flash_size()
1192 offset = cmd->offset; in ice_validate_nvm_rw_reg()
1200 switch (offset) { in ice_validate_nvm_rw_reg()
1254 cmd->offset); in ice_nvm_access_read()
1284 switch (cmd->offset) { in ice_nvm_access_write()
[all …]
/dpdk/lib/mbuf/
H A Drte_mbuf_dyn.c24 size_t offset; member
230 size_t i, offset; in __rte_mbuf_dynfield_register_offset() local
259 for (offset = 0; in __rte_mbuf_dynfield_register_offset()
261 offset++) { in __rte_mbuf_dynfield_register_offset()
266 req = offset; in __rte_mbuf_dynfield_register_offset()
280 offset = req; in __rte_mbuf_dynfield_register_offset()
306 mbuf_dynfield->offset = offset; in __rte_mbuf_dynfield_register_offset()
311 for (i = offset; i < offset + params->size; i++) in __rte_mbuf_dynfield_register_offset()
317 offset); in __rte_mbuf_dynfield_register_offset()
319 return offset; in __rte_mbuf_dynfield_register_offset()
[all …]
/dpdk/drivers/net/nfp/nfpcore/
H A Dnfp_cpp_pcie_ops.c172 if ((offset & mask) != ((offset + size - 1) & mask)) { in nfp_compute_bar()
182 offset &= mask; in nfp_compute_bar()
187 (unsigned long long)offset, in nfp_compute_bar()
203 if ((offset & mask) != ((offset + size - 1) & mask)) { in nfp_compute_bar()
217 offset &= mask; in nfp_compute_bar()
234 newcfg |= offset >> bitsize; in nfp_compute_bar()
237 *bar_base = offset; in nfp_compute_bar()
394 uint64_t offset; member
439 priv->offset = address; in nfp6000_area_init()
530 if ((priv->offset + offset) & (width - 1)) { in nfp6000_area_read()
[all …]
H A Dnfp_cppcore.c184 area->offset = address; in nfp_cpp_area_alloc_with_name()
330 if ((offset + length) > area->size) in nfp_cpp_area_read()
354 if ((offset + length) > area->size) in nfp_cpp_area_write()
382 if (((offset + length) > area->size)) in nfp_cpp_area_check_range()
436 sz = nfp_cpp_area_read(area, offset, &tmp, sizeof(tmp)); in nfp_cpp_area_readl()
460 sz = nfp_cpp_area_read(area, offset, &tmp, sizeof(tmp)); in nfp_cpp_area_readq()
758 if ((offset + length) > area->size) in nfp_cpp_area_fill()
761 if ((area->offset + offset) & 3) in nfp_cpp_area_fill()
764 if (((area->offset + offset) & 7) == 4 && length >= 4) { in nfp_cpp_area_fill()
770 offset += sizeof(value); in nfp_cpp_area_fill()
[all …]
/dpdk/drivers/net/bnxt/tf_core/
H A Dbitalloc.c91 int offset = 0; in ba_init() local
100 offset += words[lev]; in ba_init()
115 int offset, in ba_alloc_helper() argument
132 offset + words + 1, in ba_alloc_helper()
188 int offset, in ba_alloc_reverse_helper() argument
205 offset + words + 1, in ba_alloc_reverse_helper()
246 offset + words + 1, in ba_alloc_index_helper()
290 int offset, in ba_inuse_helper() argument
301 offset + words + 1, in ba_inuse_helper()
339 offset + words + 1, in ba_free_helper()
[all …]
/dpdk/drivers/raw/ifpga/base/
H A Dopae_hw_api.h170 u64 offset, unsigned int byte, void *data);
172 u64 offset, unsigned int byte, void *data);
214 opae_acc_reg_read(acc, region, offset, 8, data)
216 opae_acc_reg_write(acc, region, offset, 8, data)
218 opae_acc_reg_read(acc, region, offset, 4, data)
220 opae_acc_reg_write(acc, region, offset, 4, data)
222 opae_acc_reg_read(acc, region, offset, 2, data)
224 opae_acc_reg_write(acc, region, offset, 2, data)
226 opae_acc_reg_read(acc, region, offset, 1, data)
228 opae_acc_reg_write(acc, region, offset, 1, data)
[all …]
H A Dopae_at24_eeprom.c13 u32 offset, u8 *buf, u32 len) in at24_eeprom_read_and_try() argument
19 ret = i2c_read16(dev, slave_addr, offset, in at24_eeprom_read_and_try()
31 u32 offset, u8 *buf, int count) in at24_eeprom_read() argument
46 status = at24_eeprom_read_and_try(dev, slave_addr, offset, in at24_eeprom_read()
52 offset += len; in at24_eeprom_read()
61 u32 offset, u8 *buf, int count) in at24_eeprom_write() argument
76 status = i2c_write16(dev, slave_addr, offset, buf, len); in at24_eeprom_write()
81 offset += len; in at24_eeprom_write()

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