Searched refs:lane (Results 1 – 4 of 4) sorted by relevance
114 vgetq_lane_p64(poly64x2_t x, const int lane) in vgetq_lane_p64() argument116 RTE_ASSERT(lane >= 0 && lane <= 1); in vgetq_lane_p64()120 return p[lane]; in vgetq_lane_p64()
78 struct ccsr_lx_serdes_lan lane[LSX_SERDES_LAN_NB]; member95 } lane[LSX_SERDES_LAN_NB]; member562 reg = &serdes_base->lane[lan_id].tsc3; in ls_serdes_eth_lpbk()597 reg = &serdes_base->lane[lan_id].lnatcsr0; in lx_serdes_eth_lpbk()
4070 uint8_t lane = 0; in elink_get_warpcore_lane() local4116 lane = path << 1; in elink_get_warpcore_lane()4118 return lane; in elink_get_warpcore_lane()4402 lane; in elink_ext_phy_update_adv_fc()4700 (0x10 * lane), in elink_warpcore_enable_AN_KR()4999 uint16_t lane) in elink_warpcore_set_20G_DXGXS() argument5524 uint32_t lane; in elink_set_warpcore_loopback() local6576 uint8_t lane; in elink_warpcore_read_status() local6611 (1 << lane); in elink_warpcore_read_status()6683 if (lane < 2) { in elink_warpcore_read_status()[all …]
22 static void txgbe_read_phy_lane_tx_eq(u16 lane, struct txgbe_hw *hw,2762 static void txgbe_read_phy_lane_tx_eq(u16 lane, struct txgbe_hw *hw, in txgbe_read_phy_lane_tx_eq() argument2769 addr = TXGBE_PHY_LANE0_TX_EQ_CTL1 | (lane << 8); in txgbe_read_phy_lane_tx_eq()2771 BP_LOG("PHY LANE TX EQ Read Value: %x\n", lane); in txgbe_read_phy_lane_tx_eq()2776 addr = TXGBE_PHY_LANE0_TX_EQ_CTL2 | (lane << 8); in txgbe_read_phy_lane_tx_eq()