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Searched refs:dev_cap (Results 1 – 15 of 15) sorted by relevance

/dpdk/drivers/net/hinic/base/
H A Dhinic_pmd_cfg.c25 struct hinic_dev_cap *dev_cap, in hinic_parse_shared_res_cap() argument
32 if (dev_cap->host_sf_en) in hinic_parse_shared_res_cap()
67 if (dev_cap->nic_lro_en) in hinic_parse_l2nic_res_cap()
113 cap->ep_id = dev_cap->ep_id; in hinic_parse_pub_res_cap()
116 cap->er_id = dev_cap->er_id; in hinic_parse_pub_res_cap()
176 memset(&dev_cap, 0, sizeof(dev_cap)); in get_cap_from_fw()
177 in_len = sizeof(dev_cap); in get_cap_from_fw()
181 &dev_cap, in_len, &dev_cap, &out_len, 0); in get_cap_from_fw()
198 memset(&dev_cap, 0, sizeof(dev_cap)); in get_cap_from_pf()
199 in_len = sizeof(dev_cap); in get_cap_from_pf()
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/dpdk/drivers/net/mlx5/
H A Dmlx5_rxmode.c39 if (priv->sh->dev_cap.vf || priv->sh->dev_cap.sf) { in mlx5_promiscuous_enable()
72 if (priv->sh->dev_cap.vf || priv->sh->dev_cap.sf) { in mlx5_promiscuous_disable()
112 if (priv->sh->dev_cap.vf || priv->sh->dev_cap.sf) { in mlx5_allmulticast_enable()
145 if (priv->sh->dev_cap.vf || priv->sh->dev_cap.sf) { in mlx5_allmulticast_disable()
H A Dmlx5_txq.c104 struct mlx5_dev_cap *dev_cap = &priv->sh->dev_cap; in mlx5_get_tx_port_offloads() local
106 if (dev_cap->hw_csum) in mlx5_get_tx_port_offloads()
110 if (dev_cap->tso) in mlx5_get_tx_port_offloads()
115 if (dev_cap->swp) { in mlx5_get_tx_port_offloads()
122 if (dev_cap->tunnel_en) { in mlx5_get_tx_port_offloads()
123 if (dev_cap->hw_csum) in mlx5_get_tx_port_offloads()
125 if (dev_cap->tso) { in mlx5_get_tx_port_offloads()
126 if (dev_cap->tunnel_en & in mlx5_get_tx_port_offloads()
129 if (dev_cap->tunnel_en & in mlx5_get_tx_port_offloads()
132 if (dev_cap->tunnel_en & in mlx5_get_tx_port_offloads()
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H A Dmlx5_ethdev.c126 if (rxqs_n > priv->sh->dev_cap.ind_table_max_size) { in mlx5_dev_configure()
190 if (rss_queue_n > priv->sh->dev_cap.ind_table_max_size) { in mlx5_dev_configure_rss_reta()
206 priv->sh->dev_cap.ind_table_max_size : in mlx5_dev_configure_rss_reta()
325 max = RTE_MIN(priv->sh->dev_cap.max_cq, priv->sh->dev_cap.max_qp); in mlx5_dev_infos_get()
342 priv->reta_idx_n : priv->sh->dev_cap.ind_table_max_size; in mlx5_dev_infos_get()
527 struct mlx5_dev_cap *attr = &priv->sh->dev_cap; in mlx5_fw_version_get()
H A Dmlx5.c1315 if (config->tx_pp && !sh->dev_cap.txpp_en) { in mlx5_shared_dev_ctx_args_config()
1332 config->hw_fcs_strip = sh->dev_cap.hw_fcs_strip; in mlx5_shared_dev_ctx_args_config()
1377 sh->dev_cap.rt_timestamp = 1; in mlx5_rt_timestamp_config()
1381 sh->dev_cap.rt_timestamp = 1; in mlx5_rt_timestamp_config()
1901 if (priv->sh->dev_cap.vf) in mlx5_dev_close()
2248 struct mlx5_dev_cap *dev_cap = &priv->sh->dev_cap; in mlx5_port_args_config() local
2304 if (config->hw_padding && !dev_cap->hw_padding) { in mlx5_port_args_config()
2325 dev_cap->lro_supported = 0; in mlx5_port_args_config()
2326 if (dev_cap->lro_supported) { in mlx5_port_args_config()
2337 if (config->cqe_comp && !dev_cap->cqe_comp) { in mlx5_port_args_config()
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H A Dmlx5_vlan.c100 if (!priv->sh->dev_cap.hw_vlan_strip) { in mlx5_vlan_strip_queue_set()
149 if (!priv->sh->dev_cap.hw_vlan_strip) { in mlx5_vlan_offload_set()
H A Dmlx5_rxq.c371 if (priv->sh->dev_cap.hw_csum) in mlx5_get_rx_queue_offloads()
375 if (priv->sh->dev_cap.hw_vlan_strip) in mlx5_get_rx_queue_offloads()
377 if (priv->sh->dev_cap.lro_supported) in mlx5_get_rx_queue_offloads()
846 !priv->sh->dev_cap.lro_supported) { in mlx5_rx_queue_setup()
1576 struct mlx5_dev_cap *dev_cap = &priv->sh->dev_cap; in mlx5_mprq_prepare() local
1633 dev_cap->mprq.log_min_stride_wqe_size); in mlx5_mprq_prepare()
1662 RTE_BIT32(dev_cap->mprq.log_min_stride_wqe_size), in mlx5_mprq_prepare()
1663 RTE_BIT32(dev_cap->mprq.log_min_stride_size), in mlx5_mprq_prepare()
1664 RTE_BIT32(dev_cap->mprq.log_max_stride_size), in mlx5_mprq_prepare()
2524 log2above(priv->sh->dev_cap.ind_table_max_size); in mlx5_ind_table_obj_setup()
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H A Dmlx5_devx.c574 rqt_attr->rqt_max_size = priv->sh->dev_cap.ind_table_max_size; in mlx5_devx_ind_table_create_rqt_attr()
781 MLX5_ASSERT(priv->sh->dev_cap.lro_supported); in mlx5_devx_tir_attr_set()
1221 .allow_swp = !!priv->sh->dev_cap.swp, in mlx5_txq_create_devx_sq_resources()
1330 (uint32_t)priv->sh->dev_cap.max_qp_wr); in mlx5_txq_devx_obj_new()
H A Dmlx5_trigger.c219 dev->data->port_id, priv->sh->dev_cap.max_qp_wr); in mlx5_rxq_start()
221 dev->data->port_id, priv->sh->dev_cap.max_sge); in mlx5_rxq_start()
1120 if (!priv->sh->dev_cap.vf && !priv->sh->dev_cap.sf && in mlx5_dev_start()
H A Dmlx5.h1203 struct mlx5_dev_cap dev_cap; /* Device capabilities. */ member
1585 sh->dev_cap.dest_tir); in mlx5_devx_obj_ops_en()
H A Dmlx5_flow.c1928 if (rss->queue_num > priv->sh->dev_cap.ind_table_max_size) in mlx5_validate_action_rss()
3462 if (!priv->sh->dev_cap.mpls_en) in mlx5_flow_validate_item_mpls()
/dpdk/drivers/net/mlx5/windows/
H A Dmlx5_os.c175 sh->dev_cap.dv_flow_en = 1; in mlx5_os_capabilities_prepare()
176 sh->dev_cap.mps = MLX5_MPW_DISABLED; in mlx5_os_capabilities_prepare()
179 sh->dev_cap.hw_csum = hca_attr->csum_cap; in mlx5_os_capabilities_prepare()
181 (sh->dev_cap.hw_csum ? "" : "not ")); in mlx5_os_capabilities_prepare()
187 if (sh->dev_cap.tso) in mlx5_os_capabilities_prepare()
195 sh->dev_cap.ind_table_max_size = in mlx5_os_capabilities_prepare()
199 sh->dev_cap.ind_table_max_size); in mlx5_os_capabilities_prepare()
203 if (sh->dev_cap.tunnel_en) { in mlx5_os_capabilities_prepare()
205 sh->dev_cap.tunnel_en & in mlx5_os_capabilities_prepare()
207 sh->dev_cap.tunnel_en & in mlx5_os_capabilities_prepare()
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/dpdk/drivers/net/mlx5/linux/
H A Dmlx5_os.c172 sh->dev_cap.sf = 1; in mlx5_os_capabilities_prepare()
178 sh->dev_cap.dest_tir = 1; in mlx5_os_capabilities_prepare()
206 sh->dev_cap.cqe_comp = 1; in mlx5_os_capabilities_prepare()
210 sh->dev_cap.cqe_comp = 1; in mlx5_os_capabilities_prepare()
213 sh->dev_cap.mpls_en = in mlx5_os_capabilities_prepare()
230 sh->dev_cap.hw_csum = in mlx5_os_capabilities_prepare()
256 if (sh->dev_cap.tso) in mlx5_os_capabilities_prepare()
310 sh->dev_cap.tunnel_en & in mlx5_os_capabilities_prepare()
312 sh->dev_cap.tunnel_en & in mlx5_os_capabilities_prepare()
314 sh->dev_cap.tunnel_en & in mlx5_os_capabilities_prepare()
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H A Dmlx5_vlan_os.c110 if (!priv->sh->dev_cap.vf) in mlx5_vlan_vmwa_init()
H A Dmlx5_verbs.c875 qp_attr.cap.max_send_wr = RTE_MIN(priv->sh->dev_cap.max_qp_wr, desc); in mlx5_txq_ibv_qp_create()