168 	memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));  in mlx5_os_capabilities_prepare()
170 		sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));  in mlx5_os_capabilities_prepare()
172 		sh->dev_cap.sf = 1;  in mlx5_os_capabilities_prepare()
173 	sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;  in mlx5_os_capabilities_prepare()
174 	sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;  in mlx5_os_capabilities_prepare()
175 	sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;  in mlx5_os_capabilities_prepare()
176 	sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;  in mlx5_os_capabilities_prepare()
178 	sh->dev_cap.dest_tir = 1;  in mlx5_os_capabilities_prepare()
182 	sh->dev_cap.dv_flow_en = 1;  in mlx5_os_capabilities_prepare()
185 	if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)  in mlx5_os_capabilities_prepare()
186 		sh->dev_cap.dv_esw_en = 1;  in mlx5_os_capabilities_prepare()
195 			sh->dev_cap.mps = MLX5_MPW_ENHANCED;  in mlx5_os_capabilities_prepare()
198 			sh->dev_cap.mps = MLX5_MPW;  in mlx5_os_capabilities_prepare()
202 		sh->dev_cap.mps = MLX5_MPW_DISABLED;  in mlx5_os_capabilities_prepare()
206 		sh->dev_cap.cqe_comp = 1;  in mlx5_os_capabilities_prepare()
208 		sh->dev_cap.cqe_comp ? "" : "not ");  in mlx5_os_capabilities_prepare()
210 	sh->dev_cap.cqe_comp = 1;  in mlx5_os_capabilities_prepare()
213 	sh->dev_cap.mpls_en =  in mlx5_os_capabilities_prepare()
219 		sh->dev_cap.mpls_en ? "" : "not ");  in mlx5_os_capabilities_prepare()
225 	sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;  in mlx5_os_capabilities_prepare()
227 	sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &  in mlx5_os_capabilities_prepare()
230 	sh->dev_cap.hw_csum =  in mlx5_os_capabilities_prepare()
233 		sh->dev_cap.hw_csum ? "" : "not ");  in mlx5_os_capabilities_prepare()
234 	sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &  in mlx5_os_capabilities_prepare()
237 		(sh->dev_cap.hw_vlan_strip ? "" : "not "));  in mlx5_os_capabilities_prepare()
238 	sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &  in mlx5_os_capabilities_prepare()
248 	sh->dev_cap.ind_table_max_size =  in mlx5_os_capabilities_prepare()
252 		sh->dev_cap.ind_table_max_size);  in mlx5_os_capabilities_prepare()
253 	sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&  in mlx5_os_capabilities_prepare()
256 	if (sh->dev_cap.tso)  in mlx5_os_capabilities_prepare()
257 		sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;  in mlx5_os_capabilities_prepare()
258 	strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,  in mlx5_os_capabilities_prepare()
259 		sizeof(sh->dev_cap.fw_ver));  in mlx5_os_capabilities_prepare()
262 		sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &  in mlx5_os_capabilities_prepare()
266 	DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);  in mlx5_os_capabilities_prepare()
273 		sh->dev_cap.mprq.enabled = 1;  in mlx5_os_capabilities_prepare()
274 		sh->dev_cap.mprq.log_min_stride_size =  in mlx5_os_capabilities_prepare()
276 		sh->dev_cap.mprq.log_max_stride_size =  in mlx5_os_capabilities_prepare()
278 		sh->dev_cap.mprq.log_min_stride_num =  in mlx5_os_capabilities_prepare()
280 		sh->dev_cap.mprq.log_max_stride_num =  in mlx5_os_capabilities_prepare()
282 		sh->dev_cap.mprq.log_min_stride_wqe_size =  in mlx5_os_capabilities_prepare()
287 			sh->dev_cap.mprq.log_min_stride_size);  in mlx5_os_capabilities_prepare()
289 			sh->dev_cap.mprq.log_max_stride_size);  in mlx5_os_capabilities_prepare()
291 			sh->dev_cap.mprq.log_min_stride_num);  in mlx5_os_capabilities_prepare()
293 			sh->dev_cap.mprq.log_max_stride_num);  in mlx5_os_capabilities_prepare()
295 			sh->dev_cap.mprq.log_min_stride_wqe_size);  in mlx5_os_capabilities_prepare()
303 		sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &  in mlx5_os_capabilities_prepare()
308 	if (sh->dev_cap.tunnel_en) {  in mlx5_os_capabilities_prepare()
310 			sh->dev_cap.tunnel_en &  in mlx5_os_capabilities_prepare()
312 			sh->dev_cap.tunnel_en &  in mlx5_os_capabilities_prepare()
314 			sh->dev_cap.tunnel_en &  in mlx5_os_capabilities_prepare()
341 	sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;  in mlx5_os_capabilities_prepare()
345 		sh->dev_cap.txpp_en = 0;  in mlx5_os_capabilities_prepare()
350 		sh->dev_cap.txpp_en = 0;  in mlx5_os_capabilities_prepare()
355 		sh->dev_cap.txpp_en = 0;  in mlx5_os_capabilities_prepare()
360 		sh->dev_cap.txpp_en = 0;  in mlx5_os_capabilities_prepare()
365 		sh->dev_cap.txpp_en = 0;  in mlx5_os_capabilities_prepare()
370 	sh->dev_cap.txpp_en = 0;  in mlx5_os_capabilities_prepare()
375 		sh->dev_cap.lro_supported = 1;  in mlx5_os_capabilities_prepare()
381 	sh->dev_cap.scatter_fcs_w_decap_disable =  in mlx5_os_capabilities_prepare()
383 	sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;  in mlx5_os_capabilities_prepare()
1472 	if (sh->dev_cap.vf && sh->config.vf_nl_en)  in mlx5_dev_spawn()
2717 	const int vf = priv->sh->dev_cap.vf;  in mlx5_os_mac_addr_remove()
2743 	const int vf = priv->sh->dev_cap.vf;  in mlx5_os_mac_addr_add()