Home
last modified time | relevance | path

Searched refs:caps (Results 1 – 25 of 85) sorted by relevance

1234

/dpdk/drivers/crypto/cnxk/
H A Dcnxk_cryptodev_capabilities.c1072 memcpy(&cnxk_caps[*cur_pos], caps, nb_caps * sizeof(caps[0])); in cpt_caps_add()
1080 struct rte_cryptodev_capabilities *caps; in cn10k_crypto_caps_update() local
1088 caps->sym.cipher.key_size.max = 32; in cn10k_crypto_caps_update()
1090 caps->sym.cipher.iv_size.max = 25; in cn10k_crypto_caps_update()
1098 caps->sym.auth.key_size.max = 32; in cn10k_crypto_caps_update()
1100 caps->sym.auth.digest_size.max = 16; in cn10k_crypto_caps_update()
1102 caps->sym.auth.iv_size.max = 25; in cn10k_crypto_caps_update()
1103 caps->sym.auth.iv_size.increment = 1; in cn10k_crypto_caps_update()
1144 memcpy(&cnxk_caps[*cur_pos], caps, nb_caps * sizeof(caps[0])); in sec_caps_add()
1182 caps->sym.auth.key_size.min = 32; in cn9k_sec_crypto_caps_update()
[all …]
/dpdk/drivers/net/netvsc/
H A Dhn_rndis.c576 memset(caps, 0, sizeof(*caps)); in hn_rndis_query_hwcaps()
606 caps->ndis_hdr.ndis_rev); in hn_rndis_query_hwcaps()
626 struct ndis_rss_caps in, caps; in hn_rndis_query_rsscaps() local
646 &caps, caps_len); in hn_rndis_query_rsscaps()
651 caps.ndis_nrxr, caps.ndis_nind, caps.ndis_caps); in hn_rndis_query_rsscaps()
662 caps.ndis_hdr.ndis_rev); in hn_rndis_query_rsscaps()
679 if (caps.ndis_nrxr == 0) { in hn_rndis_query_rsscaps()
683 rxr_cnt = caps.ndis_nrxr; in hn_rndis_query_rsscaps()
690 caps.ndis_nind); in hn_rndis_query_rsscaps()
696 caps.ndis_nind); in hn_rndis_query_rsscaps()
[all …]
/dpdk/drivers/net/hns3/
H A Dhns3_cmd.c417 enum HNS3_CAPS_BITS caps; in hns3_get_caps_name() member
435 if (dev_caps[i].caps == caps_id) in hns3_get_caps_name()
455 memcpy(&caps_org, &cmd->caps[0], sizeof(caps_org)); in hns3_mask_capability()
460 memcpy(&cmd->caps[0], &caps_new, sizeof(caps_new)); in hns3_mask_capability()
474 uint32_t caps = rte_le_to_cpu_32(cmd->caps[0]); in hns3_parse_capability() local
479 if (hns3_get_bit(caps, HNS3_CAPS_PTP_B)) { in hns3_parse_capability()
492 if (hns3_get_bit(caps, HNS3_CAPS_TX_PUSH_B)) in hns3_parse_capability()
494 if (hns3_get_bit(caps, HNS3_CAPS_PHY_IMP_B)) in hns3_parse_capability()
498 if (hns3_get_bit(caps, HNS3_CAPS_STASH_B)) in hns3_parse_capability()
506 if (hns3_get_bit(caps, HNS3_CAPS_RAS_IMP_B)) in hns3_parse_capability()
[all …]
/dpdk/drivers/net/ice/base/
H A Dice_common.c2261 caps->maxtc = phys_id; in ice_parse_common_caps()
2279 caps->num_rxq); in ice_parse_common_caps()
2287 caps->num_txq); in ice_parse_common_caps()
2396 caps->maxtc = 4; in ice_recalc_port_limited_caps()
2398 caps->maxtc); in ice_recalc_port_limited_caps()
3244 cfg->caps); in ice_aq_set_phy_cfg()
3517 if (cfg.caps != pcaps->caps) { in ice_set_fc()
3579 ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) || in ice_phy_caps_equals_cfg()
3609 cfg->caps = caps->caps; in ice_copy_phy_caps_to_cfg()
3650 cfg->caps |= (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC); in ice_cfg_phy_fec()
[all …]
H A Dice_common.h146 struct ice_aqc_get_phy_caps_data *caps,
163 bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
165 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
166 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
171 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
175 struct ice_aqc_get_phy_caps_data *caps,
/dpdk/drivers/vdpa/mlx5/
H A Dmlx5_vdpa.c87 *queue_num = priv->caps.max_num_virtio_queues; in mlx5_vdpa_get_queue_num()
104 if (priv->caps.tso_ipv4) in mlx5_vdpa_get_vdpa_features()
106 if (priv->caps.tso_ipv6) in mlx5_vdpa_get_vdpa_features()
108 if (priv->caps.tx_csum) in mlx5_vdpa_get_vdpa_features()
110 if (priv->caps.rx_csum) in mlx5_vdpa_get_vdpa_features()
112 if (priv->caps.virtio_version_1_0) in mlx5_vdpa_get_vdpa_features()
144 if (vring >= (int)priv->caps.max_num_virtio_queues * 2) { in mlx5_vdpa_set_vring_state()
391 if (qid >= (int)priv->caps.max_num_virtio_queues * 2) { in mlx5_vdpa_get_stats()
396 if (!priv->caps.queue_counters_valid) { in mlx5_vdpa_get_stats()
419 if (!priv->caps.queue_counters_valid) { in mlx5_vdpa_reset_stats()
[all …]
H A Dmlx5_vdpa_virtq.c75 for (i = 0; i < priv->caps.max_num_virtio_queues * 2; i++) { in mlx5_vdpa_virtqs_cleanup()
261 if (priv->caps.queue_counters_valid) { in mlx5_vdpa_virtq_setup()
278 size = priv->caps.umems[i].a * vq.size + priv->caps.umems[i].b; in mlx5_vdpa_virtq_setup()
426 if (!(priv->caps.virtio_queue_type & (1 << in mlx5_vdpa_features_validate()
435 if (!priv->caps.tso_ipv4) { in mlx5_vdpa_features_validate()
443 if (!priv->caps.tso_ipv6) { in mlx5_vdpa_features_validate()
451 if (!priv->caps.tx_csum) { in mlx5_vdpa_features_validate()
459 if (!priv->caps.rx_csum) { in mlx5_vdpa_features_validate()
467 if (!priv->caps.virtio_version_1_0) { in mlx5_vdpa_features_validate()
495 if (nr_vring > priv->caps.max_num_virtio_queues * 2) { in mlx5_vdpa_virtqs_prepare()
[all …]
/dpdk/drivers/net/cxgbe/base/
H A Dt4_hw.c2826 lc->link_caps = caps; in t4_link_l1cfg_core()
2830 caps, ret); in t4_link_l1cfg_core()
4336 u32 caps = *new_caps; in t4_set_link_autoneg_speed() local
4341 *new_caps = caps; in t4_set_link_autoneg_speed()
4348 u32 caps = *new_caps; in t4_set_link_speed() local
4354 caps |= fw_speed_cap; in t4_set_link_speed()
4356 *new_caps = caps; in t4_set_link_speed()
4365 u32 caps = *new_caps; in t4_set_link_pause() local
4374 caps |= FW_PORT_CAP32_ANEG; in t4_set_link_pause()
4406 *new_caps = caps; in t4_set_link_pause()
[all …]
H A Dcommon.h320 int t4_link_l1cfg_core(struct port_info *pi, u32 caps, u8 sleep_ok);
321 static inline int t4_link_l1cfg(struct port_info *pi, u32 caps) in t4_link_l1cfg() argument
323 return t4_link_l1cfg_core(pi, caps, true); in t4_link_l1cfg()
326 static inline int t4_link_l1cfg_ns(struct port_info *pi, u32 caps) in t4_link_l1cfg_ns() argument
328 return t4_link_l1cfg_core(pi, caps, false); in t4_link_l1cfg_ns()
336 unsigned int t4_fwcap_to_speed(u32 caps);
/dpdk/drivers/net/qede/
H A Dqede_sriov.c198 struct ecore_mcp_link_capabilities caps; in qed_inform_vf_link_state() local
209 rte_memcpy(&caps, ecore_mcp_get_link_capabilities(lead_hwfn), in qed_inform_vf_link_state()
210 sizeof(caps)); in qed_inform_vf_link_state()
215 &params, &link, &caps); in qed_inform_vf_link_state()
/dpdk/lib/eventdev/
H A Drte_eventdev.c106 uint32_t *caps) in rte_event_eth_rx_adapter_caps_get() argument
115 if (caps == NULL) in rte_event_eth_rx_adapter_caps_get()
121 *caps = 0; in rte_event_eth_rx_adapter_caps_get()
126 caps) in rte_event_eth_rx_adapter_caps_get()
140 if (caps == NULL) in rte_event_timer_adapter_caps_get()
142 *caps = 0; in rte_event_timer_adapter_caps_get()
147 caps, in rte_event_timer_adapter_caps_get()
166 if (caps == NULL) in rte_event_crypto_adapter_caps_get()
172 *caps = 0; in rte_event_crypto_adapter_caps_get()
198 *caps = 0; in rte_event_eth_tx_adapter_caps_get()
[all …]
H A Drte_eventdev.h1374 uint32_t *caps);
1396 rte_event_timer_adapter_caps_get(uint8_t dev_id, uint32_t *caps);
1445 uint32_t *caps);
1475 uint32_t *caps);
H A Deventdev_pmd.h627 uint32_t *caps);
657 const struct rte_eventdev *dev, uint64_t flags, uint32_t *caps,
936 uint32_t *caps);
1097 uint32_t *caps);
/dpdk/drivers/crypto/scheduler/
H A Drte_cryptodev_scheduler.c19 sync_caps(struct rte_cryptodev_capabilities *caps, in sync_caps() argument
30 rte_memcpy(caps, worker_caps, sizeof(*caps) * nb_worker_caps); in sync_caps()
35 struct rte_cryptodev_capabilities *cap = &caps[i]; in sync_caps()
80 rte_memcpy(&caps[j], &caps[j+1], sizeof(*cap)); in sync_caps()
82 memset(&caps[sync_nb_caps - 1], 0, sizeof(*cap)); in sync_caps()
/dpdk/drivers/event/dsw/
H A Ddsw_evdev.c376 uint32_t *caps) in dsw_eth_rx_adapter_caps_get() argument
378 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP; in dsw_eth_rx_adapter_caps_get()
384 uint64_t flags __rte_unused, uint32_t *caps, in dsw_timer_adapter_caps_get() argument
387 *caps = 0; in dsw_timer_adapter_caps_get()
395 uint32_t *caps) in dsw_crypto_adapter_caps_get() argument
397 *caps = RTE_EVENT_CRYPTO_ADAPTER_SW_CAP; in dsw_crypto_adapter_caps_get()
/dpdk/examples/eventdev_pipeline/
H A Dpipeline_worker_generic.c563 set_worker_generic_setup_data(struct setup_data *caps, bool burst) in set_worker_generic_setup_data() argument
566 caps->worker = worker_generic_burst; in set_worker_generic_setup_data()
568 caps->worker = worker_generic; in set_worker_generic_setup_data()
571 caps->adptr_setup = init_adapters; in set_worker_generic_setup_data()
572 caps->scheduler = schedule_devices; in set_worker_generic_setup_data()
573 caps->evdev_setup = setup_eventdev_generic; in set_worker_generic_setup_data()
574 caps->check_opt = generic_opt_check; in set_worker_generic_setup_data()
H A Dpipeline_common.h174 void set_worker_generic_setup_data(struct setup_data *caps, bool burst);
175 void set_worker_tx_enq_setup_data(struct setup_data *caps, bool burst);
/dpdk/examples/l3fwd-power/
H A Dperf_core.c34 struct rte_power_core_capabilities caps; in is_hp_core() local
42 ret = rte_power_get_capabilities(lcore, &caps); in is_hp_core()
43 return ret == 0 && caps.turbo; in is_hp_core()
/dpdk/drivers/event/octeontx/
H A Dssovf_evdev.c372 const struct rte_eth_dev *eth_dev, uint32_t *caps) in ssovf_eth_rx_adapter_caps_get() argument
379 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP; in ssovf_eth_rx_adapter_caps_get()
381 *caps = RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT; in ssovf_eth_rx_adapter_caps_get()
555 const struct rte_eth_dev *eth_dev, uint32_t *caps) in ssovf_eth_tx_adapter_caps_get() argument
562 *caps = 0; in ssovf_eth_tx_adapter_caps_get()
564 *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT; in ssovf_eth_tx_adapter_caps_get()
725 uint32_t *caps, const struct event_timer_adapter_ops **ops) in ssovf_timvf_caps_get() argument
727 return timvf_timer_adapter_caps_get(dev, flags, caps, ops, in ssovf_timvf_caps_get()
733 const struct rte_cryptodev *cdev, uint32_t *caps) in ssovf_crypto_adapter_caps_get() argument
738 *caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD | in ssovf_crypto_adapter_caps_get()
/dpdk/examples/ipsec-secgw/
H A Devent_helper.c110 uint32_t caps = 0; in eh_dev_has_rx_internal_port() local
112 ret = rte_event_eth_rx_adapter_caps_get(eventdev_id, j, &caps); in eh_dev_has_rx_internal_port()
116 if (!(caps & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT)) in eh_dev_has_rx_internal_port()
129 uint32_t caps = 0; in eh_dev_has_tx_internal_port() local
131 ret = rte_event_eth_tx_adapter_caps_get(eventdev_id, j, &caps); in eh_dev_has_tx_internal_port()
135 if (!(caps & RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT)) in eh_dev_has_tx_internal_port()
331 uint32_t caps = 0; in eh_set_default_conf_rx_adapter() local
399 ret = rte_event_eth_rx_adapter_caps_get(eventdev_id, i, &caps); in eh_set_default_conf_rx_adapter()
405 if (!(caps & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT)) in eh_set_default_conf_rx_adapter()
434 uint32_t caps = 0; in eh_set_default_conf_tx_adapter() local
[all …]
/dpdk/examples/l2fwd-event/
H A Dl2fwd_event.c65 uint32_t service_id, caps; in l2fwd_event_service_setup() local
82 evt_rsrc->rx_adptr.rx_adptr[i], &caps); in l2fwd_event_service_setup()
97 evt_rsrc->tx_adptr.tx_adptr[i], &caps); in l2fwd_event_service_setup()
115 uint32_t caps = 0; in l2fwd_event_capability_setup() local
120 ret = rte_event_eth_tx_adapter_caps_get(0, i, &caps); in l2fwd_event_capability_setup()
125 evt_rsrc->tx_mode_q |= !(caps & in l2fwd_event_capability_setup()
/dpdk/lib/power/
H A Dpower_acpi_cpufreq.c560 struct rte_power_core_capabilities *caps) in power_acpi_get_capabilities() argument
568 if (caps == NULL) { in power_acpi_get_capabilities()
574 caps->capabilities = 0; in power_acpi_get_capabilities()
575 caps->turbo = !!(pi->turbo_available); in power_acpi_get_capabilities()
/dpdk/drivers/event/dpaa/
H A Ddpaa_eventdev.c617 uint32_t *caps) in dpaa_event_eth_rx_adapter_caps_get() argument
626 *caps = RTE_EVENT_ETH_RX_ADAPTER_DPAA_CAP; in dpaa_event_eth_rx_adapter_caps_get()
628 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP; in dpaa_event_eth_rx_adapter_caps_get()
729 uint32_t *caps) in dpaa_eventdev_crypto_caps_get() argument
738 *caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP; in dpaa_eventdev_crypto_caps_get()
883 uint32_t *caps) in dpaa_eventdev_tx_adapter_caps() argument
888 *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT; in dpaa_eventdev_tx_adapter_caps()
/dpdk/examples/l3fwd/
H A Dl3fwd_event.c172 uint32_t caps = 0; in l3fwd_event_capability_setup() local
177 ret = rte_event_eth_tx_adapter_caps_get(0, i, &caps); in l3fwd_event_capability_setup()
183 evt_rsrc->tx_mode_q |= !(caps & in l3fwd_event_capability_setup()
/dpdk/drivers/event/cnxk/
H A Dcn10k_eventdev.c678 const struct rte_eth_dev *eth_dev, uint32_t *caps) in cn10k_sso_rx_adapter_caps_get() argument
685 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP; in cn10k_sso_rx_adapter_caps_get()
687 *caps = RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | in cn10k_sso_rx_adapter_caps_get()
777 const struct rte_eth_dev *eth_dev, uint32_t *caps) in cn10k_sso_tx_adapter_caps_get() argument
784 *caps = 0; in cn10k_sso_tx_adapter_caps_get()
786 *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT | in cn10k_sso_tx_adapter_caps_get()
876 const struct rte_cryptodev *cdev, uint32_t *caps) in cn10k_crypto_adapter_caps_get() argument
881 *caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD | in cn10k_crypto_adapter_caps_get()

1234