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Searched refs:aq (Results 1 – 23 of 23) sorted by relevance

/dpdk/drivers/common/cnxk/
H A Droc_nix_queue.c65 aq->rq_mask.ena = ~(aq->rq_mask.ena); in nix_rq_ena_dis()
78 aq->rq_mask.ena = ~(aq->rq_mask.ena); in nix_rq_ena_dis()
176 aq->rq_mask.ltag = ~aq->rq_mask.ltag; in nix_rq_cn9k_cfg()
182 aq->rq_mask.ltag = ~aq->rq_mask.ltag; in nix_rq_cn9k_cfg()
183 aq->rq_mask.cq = ~aq->rq_mask.cq; in nix_rq_cn9k_cfg()
195 aq->rq_mask.ena = ~aq->rq_mask.ena; in nix_rq_cn9k_cfg()
346 aq->rq_mask.cq = ~aq->rq_mask.cq; in nix_rq_cfg()
365 aq->rq_mask.ena = ~aq->rq_mask.ena; in nix_rq_cfg()
595 aq->cq_mask.ena = ~aq->cq_mask.ena; in roc_nix_cq_fini()
785 aq->sq_mask.ena = ~aq->sq_mask.ena; in sq_cn9k_fini()
[all …]
H A Droc_nix_bpf.c646 aq->prof_mask.lmode = ~(aq->prof_mask.lmode); in roc_nix_bpf_config()
647 aq->prof_mask.icolor = ~(aq->prof_mask.icolor); in roc_nix_bpf_config()
649 aq->prof_mask.pc_mode = ~(aq->prof_mask.pc_mode); in roc_nix_bpf_config()
650 aq->prof_mask.tnl_ena = ~(aq->prof_mask.tnl_ena); in roc_nix_bpf_config()
651 aq->prof_mask.gc_action = ~(aq->prof_mask.gc_action); in roc_nix_bpf_config()
652 aq->prof_mask.yc_action = ~(aq->prof_mask.yc_action); in roc_nix_bpf_config()
653 aq->prof_mask.rc_action = ~(aq->prof_mask.rc_action); in roc_nix_bpf_config()
808 aq->prof_mask.pc_mode = ~(aq->prof_mask.pc_mode); in roc_nix_bpf_pre_color_tbl_setup()
809 aq->prof_mask.tnl_ena = ~(aq->prof_mask.tnl_ena); in roc_nix_bpf_pre_color_tbl_setup()
842 aq->prof_mask.hl_en = ~(aq->prof_mask.hl_en); in roc_nix_bpf_connect()
[all …]
H A Droc_nix_stats.c127 if (!aq) in nix_stat_rx_queue_reset()
140 aq->rq_mask.octs = ~(aq->rq_mask.octs); in nix_stat_rx_queue_reset()
141 aq->rq_mask.pkts = ~(aq->rq_mask.pkts); in nix_stat_rx_queue_reset()
144 aq->rq_mask.re_pkts = ~(aq->rq_mask.re_pkts); in nix_stat_rx_queue_reset()
162 aq->rq_mask.octs = ~(aq->rq_mask.octs); in nix_stat_rx_queue_reset()
163 aq->rq_mask.pkts = ~(aq->rq_mask.pkts); in nix_stat_rx_queue_reset()
166 aq->rq_mask.re_pkts = ~(aq->rq_mask.re_pkts); in nix_stat_rx_queue_reset()
194 aq->sq_mask.octs = ~(aq->sq_mask.octs); in nix_stat_tx_queue_reset()
195 aq->sq_mask.pkts = ~(aq->sq_mask.pkts); in nix_stat_tx_queue_reset()
213 aq->sq_mask.octs = ~(aq->sq_mask.octs); in nix_stat_tx_queue_reset()
[all …]
H A Droc_nix_fc.c116 struct nix_aq_enq_req *aq; in nix_fc_cq_config_get() local
119 if (!aq) in nix_fc_cq_config_get()
129 if (!aq) in nix_fc_cq_config_get()
159 if (!aq) in nix_fc_cq_config_set()
168 aq->cq_mask.bpid = ~(aq->cq_mask.bpid); in nix_fc_cq_config_set()
170 aq->cq_mask.bp = ~(aq->cq_mask.bp); in nix_fc_cq_config_set()
174 aq->cq_mask.bp_ena = ~(aq->cq_mask.bp_ena); in nix_fc_cq_config_set()
179 if (!aq) in nix_fc_cq_config_set()
188 aq->cq_mask.bpid = ~(aq->cq_mask.bpid); in nix_fc_cq_config_set()
190 aq->cq_mask.bp = ~(aq->cq_mask.bp); in nix_fc_cq_config_set()
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H A Droc_npa_debug.c92 struct npa_aq_enq_req *aq; in roc_npa_ctx_dump() local
107 aq = mbox_alloc_msg_npa_aq_enq(lf->mbox); in roc_npa_ctx_dump()
108 if (aq == NULL) in roc_npa_ctx_dump()
110 aq->aura_id = q; in roc_npa_ctx_dump()
111 aq->ctype = NPA_AQ_CTYPE_POOL; in roc_npa_ctx_dump()
112 aq->op = NPA_AQ_INSTOP_READ; in roc_npa_ctx_dump()
128 aq = mbox_alloc_msg_npa_aq_enq(lf->mbox); in roc_npa_ctx_dump()
129 if (aq == NULL) in roc_npa_ctx_dump()
131 aq->aura_id = q; in roc_npa_ctx_dump()
132 aq->ctype = NPA_AQ_CTYPE_AURA; in roc_npa_ctx_dump()
[all …]
H A Droc_nix_tm.c799 struct nix_aq_enq_req *aq; in nix_tm_sq_sched_conf() local
802 if (!aq) in nix_tm_sq_sched_conf()
805 aq->qidx = qid; in nix_tm_sq_sched_conf()
811 aq->sq.smq = smq; in nix_tm_sq_sched_conf()
812 aq->sq_mask.smq = ~aq->sq_mask.smq; in nix_tm_sq_sched_conf()
815 aq->sq_mask.smq_rr_quantum = ~aq->sq_mask.smq_rr_quantum; in nix_tm_sq_sched_conf()
820 if (!aq) in nix_tm_sq_sched_conf()
823 aq->qidx = qid; in nix_tm_sq_sched_conf()
829 aq->sq.smq = smq; in nix_tm_sq_sched_conf()
830 aq->sq_mask.smq = ~aq->sq_mask.smq; in nix_tm_sq_sched_conf()
[all …]
H A Droc_nix_debug.c324 struct nix_aq_enq_req *aq; in nix_q_ctx_get() local
327 aq = mbox_alloc_msg_nix_aq_enq(mbox); in nix_q_ctx_get()
328 if (!aq) in nix_q_ctx_get()
331 aq->qidx = qid; in nix_q_ctx_get()
332 aq->ctype = ctype; in nix_q_ctx_get()
333 aq->op = NIX_AQ_INSTOP_READ; in nix_q_ctx_get()
346 struct nix_cn10k_aq_enq_req *aq; in nix_q_ctx_get() local
349 if (!aq) in nix_q_ctx_get()
352 aq->qidx = qid; in nix_q_ctx_get()
353 aq->ctype = ctype; in nix_q_ctx_get()
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/dpdk/drivers/net/i40e/base/
H A Di40e_adminq.c284 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
287 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
294 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
297 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in i40e_config_asq_regs()
334 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
344 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in i40e_config_arq_regs()
411 hw->aq.asq.count = hw->aq.num_asq_entries; in i40e_init_asq()
474 hw->aq.arq.count = hw->aq.num_arq_entries; in i40e_init_arq()
582 struct i40e_adminq_info *aq = &hw->aq; in i40e_set_hw_flags() local
653 struct i40e_adminq_info *aq = &hw->aq; in i40e_init_adminq() local
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H A Di40e_nvm.c1045 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1056 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1070 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1087 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1104 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1120 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1239 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1255 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1313 hw->aq.asq_last_status); in i40e_nvmupd_state_writing()
1342 if (hw->aq.arq_last_status) { in i40e_nvmupd_clear_wait_state()
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H A Di40e_dcb.c793 if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) in i40e_get_ieee_dcb_config()
814 (((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) || in i40e_get_dcb_config()
815 (hw->aq.fw_maj_ver < 4))) in i40e_get_dcb_config()
820 ((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver == 33))) { in i40e_get_dcb_config()
845 if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) in i40e_get_dcb_config()
862 if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) in i40e_get_dcb_config()
971 } else if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) { in i40e_get_fw_lldp_status()
975 } else if (hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { in i40e_get_fw_lldp_status()
H A Di40e_common.c378 if (hw->aq.asq.len) in i40e_check_asq_alive()
1742 switch (hw->aq.asq_last_status) { in i40e_aq_get_phy_capabilities()
2077 (hw->aq.fw_maj_ver < 4 || (hw->aq.fw_maj_ver == 4 && in i40e_aq_get_link_info()
2288 if (hw->aq.api_maj_ver > maj || in i40e_hw_ver_ge()
2289 (hw->aq.api_maj_ver == maj && hw->aq.api_min_ver >= min)) in i40e_hw_ver_ge()
6140 if (hw->aq.fw_maj_ver < 6) in i40e_aq_replace_cloud_filters()
7450 (hw->aq.api_min_ver < 5)) || in i40e_read_rx_ctl()
7511 (hw->aq.api_min_ver < 5)) || in i40e_write_rx_ctl()
8154 msglen = aq->datalen; in i40e_ddp_exec_aq_section()
8161 msg = &aq->data[0]; in i40e_ddp_exec_aq_section()
[all …]
H A Di40e_type.h720 struct i40e_adminq_info aq; member
/dpdk/drivers/common/iavf/
H A Diavf_adminq.c266 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | in iavf_config_asq_regs()
268 wr32(hw, hw->aq.asq.bal, IAVF_LO_DWORD(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs()
269 wr32(hw, hw->aq.asq.bah, IAVF_HI_DWORD(hw->aq.asq.desc_buf.pa)); in iavf_config_asq_regs()
295 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | in iavf_config_arq_regs()
301 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); in iavf_config_arq_regs()
360 hw->aq.asq.count = hw->aq.num_asq_entries; in iavf_init_asq()
423 hw->aq.arq.count = hw->aq.num_arq_entries; in iavf_init_arq()
632 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in iavf_asq_done()
748 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); in iavf_asq_send_command()
768 if (hw->aq.asq.next_to_use == hw->aq.asq.count) in iavf_asq_send_command()
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H A Diavf_common.c332 if (hw->aq.asq.len) in iavf_check_asq_alive()
333 return !!(rd32(hw, hw->aq.asq.len) & in iavf_check_asq_alive()
H A Diavf_type.h343 struct iavf_adminq_info aq; member
/dpdk/drivers/net/iavf/
H A Diavf.h340 hw->aq.num_arq_entries = IAVF_AQ_LEN; in iavf_init_adminq_parameter()
341 hw->aq.num_asq_entries = IAVF_AQ_LEN; in iavf_init_adminq_parameter()
342 hw->aq.arq_buf_size = IAVF_AQ_BUF_SZ; in iavf_init_adminq_parameter()
343 hw->aq.asq_buf_size = IAVF_AQ_BUF_SZ; in iavf_init_adminq_parameter()
/dpdk/drivers/net/mlx5/
H A Dmlx5_txpp.c476 struct mlx5_txpp_wq *aq = &sh->txpp.rearm_queue; in mlx5_txpp_cq_arm() local
477 uint32_t arm_sn = aq->arm_sn << MLX5_CQ_SQN_OFFSET; in mlx5_txpp_cq_arm()
478 uint32_t db_hi = arm_sn | MLX5_CQ_DBR_CMD_ALL | aq->cq_ci; in mlx5_txpp_cq_arm()
480 rte_cpu_to_be_64(((uint64_t)db_hi << 32) | aq->cq_obj.cq->id); in mlx5_txpp_cq_arm()
483 &aq->cq_obj.db_rec[MLX5_CQ_ARM_DB], 0); in mlx5_txpp_cq_arm()
484 aq->arm_sn++; in mlx5_txpp_cq_arm()
/dpdk/drivers/net/ice/
H A Dice_dcf.c610 hw->avf.aq.num_arq_entries = ICE_DCF_AQ_LEN; in ice_dcf_init_hw()
611 hw->avf.aq.num_asq_entries = ICE_DCF_AQ_LEN; in ice_dcf_init_hw()
612 hw->avf.aq.arq_buf_size = ICE_DCF_AQ_BUF_SZ; in ice_dcf_init_hw()
613 hw->avf.aq.asq_buf_size = ICE_DCF_AQ_BUF_SZ; in ice_dcf_init_hw()
/dpdk/drivers/net/i40e/
H A Di40e_ethdev.c1521 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, in eth_i40e_dev_init()
1522 hw->aq.api_maj_ver, hw->aq.api_min_ver, in eth_i40e_dev_init()
5540 hw->aq.asq_last_status); in i40e_vsi_get_bw_config()
6694 hw->aq.asq_last_status); in i40e_dev_handle_aq_msg()
10110 if (hw->aq.fw_maj_ver < 6) in i40e_configure_registers()
10624 hw->aq.asq_last_status); in i40e_config_switch_comp_tc()
10634 hw->aq.asq_last_status); in i40e_config_switch_comp_tc()
10643 hw->aq.asq_last_status); in i40e_config_switch_comp_tc()
10710 hw->aq.asq_last_status); in i40e_vsi_config_tc()
10731 hw->aq.asq_last_status); in i40e_vsi_config_tc()
[all …]
H A Di40e_ethdev.h1477 hw->aq.num_arq_entries = I40E_AQ_LEN; in i40e_init_adminq_parameter()
1478 hw->aq.num_asq_entries = I40E_AQ_LEN; in i40e_init_adminq_parameter()
1479 hw->aq.arq_buf_size = I40E_AQ_BUF_SZ; in i40e_init_adminq_parameter()
1480 hw->aq.asq_buf_size = I40E_AQ_BUF_SZ; in i40e_init_adminq_parameter()
H A Drte_pmd_i40e.c342 if (hw->aq.fw_maj_ver < 5 && hw->mac.type != I40E_MAC_X722) { in i40e_vsi_set_tx_loopback()
2585 hw->aq.asq_last_status); in i40e_vsi_update_queue_region_mapping()
2890 i40e_aq_str(hw, hw->aq.asq_last_status)); in i40e_queue_region_dcb_configure()
H A Di40e_pf.c262 hw->aq.asq_last_status); in i40e_pf_host_send_msg_to_vf()
/dpdk/drivers/baseband/acc100/
H A Drte_acc100_pmd.c185 uint16_t aq; in updateQtop() local
197 for (aq = 0; aq < ACC100_NUM_AQS; aq++) { in updateQtop()
199 0, qg, aq)); in updateQtop()