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Searched defs:getMinVectorRegisterBitWidth (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXTargetTransformInfo.h82 unsigned getMinVectorRegisterBitWidth() const { return 32; } in getMinVectorRegisterBitWidth() function
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600TargetTransformInfo.cpp44 unsigned R600TTIImpl::getMinVectorRegisterBitWidth() const { return 32; } in getMinVectorRegisterBitWidth() function in R600TTIImpl
H A DAMDGPUTargetTransformInfo.cpp321 unsigned GCNTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in GCNTTIImpl
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVETargetTransformInfo.h120 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.h82 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h130 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
H A DAArch64Subtarget.h194 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.cpp116 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in HexagonTTIImpl
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h422 unsigned getMinVectorRegisterBitWidth() const { return 128; } in getMinVectorRegisterBitWidth() function
H A DTargetTransformInfo.h2173 unsigned getMinVectorRegisterBitWidth() const override { in getMinVectorRegisterBitWidth() function
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp635 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in TargetTransformInfo