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Searched defs:TargetReg (Results 1 – 8 of 8) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVRedundantCopyElimination.cpp113 Register TargetReg = CondBr->getOperand(0).getReg(); in optimizeBlock() local
/llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp186 unsigned TargetReg = Inst.getOperand(1).getReg(); in emitInstruction() local
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp992 unsigned TargetReg; in tracePredStateThroughIndirectBranches() local
1110 Register TargetReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
1143 Register TargetReg = TargetAddrSSA.GetValueInMiddleOfBlock(&MBB); in tracePredStateThroughIndirectBranches() local
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp896 Register TargetReg = I->getOperand(1).getReg(); in expandEhReturn() local
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2988 Register TargetReg = MI.getOperand(0).getReg(); in expandVSXMemPseudo() local
3075 Register TargetReg = MI.getOperand(0).getReg(); in expandPostRAPseudo() local
3097 Register TargetReg = MI.getOperand(0).getReg(); in expandPostRAPseudo() local
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp167 Register TargetReg) { in buildGitPtr()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp3599 Register TargetReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass); in selectBrJT() local
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp2834 Register TargetReg, Register InsertReg, in buildBitFieldInsert()