Searched defs:Setcc (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4524 bool X86DAGToDAGISel::tryVPTESTM(SDNode *Root, SDValue Setcc, in tryVPTESTM()
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| H A D | X86ISelLowering.cpp | 43242 SDValue Setcc = DAG.getSetCC(DL, SetccVT, Movmsk, CmpC, CondCode); in combinePredicateReduction() local
51677 SDValue Setcc = DAG.getNode(X86ISD::SETCC_CARRY, DL, VT, N0->getOperand(0), in combineSext() local
51834 SDValue Setcc = DAG.getNode(X86ISD::SETCC_CARRY, dl, VT, N0->getOperand(0), in combineZext() local
52195 SDValue Setcc = DAG.getSetCC(DL, OpVT, LHS, RHS, CC); in combineSetCC() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1874 SDValue Setcc = DAG.getSetCC(DL, SetccVT, Abs, MaxValNode, ISD::SETOLT); in lowerFTRUNC_FCEIL_FFLOOR() local
1926 SDValue Setcc = DAG.getSetCC(DL, SetccVT, Abs, MaxValNode, ISD::SETOLT); in lowerFROUND() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6058 SDValue Setcc = DAG.getSetCC(DL, CCVT, NewAnd, Zero, ISD::SETEQ); in combineShiftAnd1ToBitTest() local
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