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Searched defs:RegisterVT (Results 1 – 11 of 11) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.cpp50 MVT RegisterVT = TLI.getRegisterType(Ctx, VT); in computeLegalValueVTs() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp381 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT); in CreateRegs() local
H A DSelectionDAGBuilder.cpp352 MVT RegisterVT; in getCopyFromPartsVector() local
748 MVT RegisterVT; in getCopyToPartsVector() local
852 MVT RegisterVT = in RegsForValue() local
881 MVT RegisterVT = isABIMangled() in getCopyFromRegs() local
964 MVT RegisterVT = isABIMangled() in getCopyToRegs() local
1049 MVT RegisterVT = RegVTs[Value]; in AddInlineAsmOperands() local
1066 MVT RegisterVT = std::get<1>(CountAndVT); in getRegsAndSizes() local
10296 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT); in LowerCallTo() local
10362 MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
10941 MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]); in LowerArguments() local
[all …]
H A DFastISel.cpp1002 MVT RegisterVT = TLI.getRegisterType(CLI.RetTy->getContext(), VT); in lowerCallTo() local
H A DSelectionDAG.cpp2436 MVT RegisterVT; in getReducedAlign() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h440 std::optional<MVT> RegisterVT) const override { in getNumRegisters()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1147 MVT &RegisterVT, in getVectorTypeBreakdownMVT()
1531 MVT RegisterVT; in computeRegisterProperties() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp109 MVT RegisterVT; in getRegisterTypeForCallingConv() local
143 MVT RegisterVT; in getNumRegistersForCallingConv() local
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1135 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
1652 MVT RegisterVT; in getRegisterType() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1150 MVT RegisterVT = getRegisterTypeForCallingConv(Ctx, CC, ArgVT); in analyzeFormalArgumentsCompute() local
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp27056 MVT RegisterVT; in getRegisterTypeForCallingConv() local