| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 322 EVT ExtVT = TLI.getTypeForExtReturn(Ctx, VT, in lowerReturnVal() local
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| H A D | AMDGPUISelLowering.cpp | 2972 EVT ExtVT = cast<VTSDNode>(N1)->getVT(); in performAssertSZExtCombine() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5651 EVT LoadResultTy, EVT &ExtVT) { in isAndLoadExtLoad()
5800 EVT ExtVT; in SearchForAndLoads() local
6181 EVT ExtVT = VT; in visitAND() local
6359 EVT ExtVT = Ext->getValueType(0); in visitAND() local
9253 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), LowBits); in visitSRA() local
12349 EVT ExtVT; in visitZERO_EXTEND() local
12743 EVT ExtVT = VT; in reduceLoadWidth() local
12977 EVT ExtVT = cast<VTSDNode>(N1)->getVT(); in visitSIGN_EXTEND_INREG() local
13211 EVT ExtVT = cast<VTSDNode>(ExtVal)->getVT(); in visitTRUNCATE() local
19952 EVT ExtVT = VecVT.getVectorElementType(); in visitEXTRACT_VECTOR_ELT() local
[all …]
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| H A D | LegalizeIntegerTypes.cpp | 1396 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), NVT.getVectorElementType(), in PromoteIntRes_TRUNCATE() local
5080 EVT ExtVT = N->getMemoryVT(); in ExpandIntOp_STORE() local
5222 EVT ExtVT = NOutVT.changeVectorElementType(PromEltVT); in PromoteIntRes_EXTRACT_SUBVECTOR() local
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| H A D | LegalizeVectorTypes.cpp | 407 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() local
4514 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in WidenVecRes_InregOp() local
5093 EVT ExtVT = EVT::getVectorVT(Ctx, ToMaskVT.getVectorElementType(), in convertMask() local
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| H A D | SelectionDAG.cpp | 11146 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); in UnrollVectorOp() local
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 14218 MVT ExtVT = VT; in lowerShuffleAsElementInsertion() local
19240 MVT ExtVT; in lower1BitShuffle() local
21887 MVT ExtVT = VT; in LowerZERO_EXTEND_Mask() local
22111 MVT ExtVT = MVT::getVectorVT(EltVT, NumElts); in LowerTruncateVecI1() local
25358 MVT ExtVT = VT; in LowerSIGN_EXTEND_Mask() local
29803 MVT ExtVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerShiftByScalarVariable() local
30297 MVT ExtVT = MVT::v8i32; in LowerShift() local
30439 MVT ExtVT = MVT::getVectorVT(ExtSVT, NumElts / 2); in LowerFunnelShift() local
30647 MVT ExtVT = MVT::getVectorVT(ExtSVT, NumElts / 2); in LowerRotate() local
41510 MVT ExtVT = VT.getSimpleVT(); in SimplifyDemandedVectorEltsForTargetNode() local
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 6121 EVT ExtVT = Op.getValueType(); in combineExtract() local
6777 EVT ExtVT = EVT::getVectorVT( in combineINT_TO_FP() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3777 MVT ExtVT = in LowerVectorFP_TO_INT() local
16019 EVT ExtVT = VecToExtend.getValueType().changeVectorElementType(MVT::i32); in performBuildVectorCombine() local
16498 EVT ExtVT = in performIntrinsicCombine() local
19163 EVT ExtVT = VT.getDoubleNumVectorElementsVT(*DAG.getContext()); in performSignExtendInRegCombine() local
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 8011 EVT ExtVT = VT.getVectorElementType(); in LowerBUILD_VECTOR() local
9236 EVT ExtVT = ToVT.getHalfNumVectorElementsVT(*DAG.getContext()); in LowerVectorExtend() local
17704 MVT ExtVT, HalfVT; in PerformMinMaxCombine() local
18485 EVT ExtVT = N->getOperand(0).getValueType().getHalfNumVectorElementsVT( in PerformMVEExtCombine() local
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8475 EVT ExtVT = Src.getValueType(); in LowerINT_TO_FPVector() local
14212 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in addShuffleForVecExtend() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4251 MVT ExtVT = Op.getSimpleValueType(); in lowerFixedLengthVectorExtendToRVV() local
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