16 fn unsigned_field_width(value: u32, width: u8) -> u32 {  in unsigned_field_width()
17     debug_assert_eq!(value & (!0 << width), 0);  in unsigned_field_width()
68 pub fn encode_i_type(opcode: u32, rd: WritableReg, width: u32, rs1: Reg, offset: Imm12) -> u32 {  in encode_i_type()
72         width,  in encode_i_type()
83 pub fn encode_s_type(opcode: u32, width: u32, base: Reg, src: Reg, offset: Imm12) -> u32 {  in encode_s_type()
87     bits |= unsigned_field_width(width, 3) << 12;  in encode_s_type()
257     width: VecElementWidth,  in encode_vmem_load()
265     let width = match width {  in encode_vmem_load()  localVariable
275     bits |= width << 12;  in encode_vmem_load()
296     width: VecElementWidth,  in encode_vmem_store()
305     encode_vmem_load(opcode, vs3, width, rs1, sumop, masking, mop, nf)  in encode_vmem_store()
656 pub fn encode_fli(width: FpuOPWidth, imm: FliConstant, rd: WritableReg) -> u32 {  in encode_fli()
669     bits |= unsigned_field_width(op.funct7(width), 7) << 25;  in encode_fli()
673 pub fn encode_fp_rr(op: FpuOPRR, width: FpuOPWidth, frm: FRM, rd: WritableReg, rs: Reg) -> u32 {  in encode_fp_rr()
680         op.funct7(width),  in encode_fp_rr()
686     width: FpuOPWidth,  in encode_fp_rrr()
698         op.funct7(width),  in encode_fp_rrr()
704     width: FpuOPWidth,  in encode_fp_rrrr()
711     let funct7 = (reg_to_gpr_num(rs3) << 2) | width.as_u32();  in encode_fp_rrrr()