Lines Matching refs:opcode
24 fn encode_r_type_bits(opcode: u32, rd: u32, funct3: u32, rs1: u32, rs2: u32, funct7: u32) -> u32 { in encode_r_type_bits()
26 bits |= unsigned_field_width(opcode, 7); in encode_r_type_bits()
37 opcode: u32, in encode_r_type()
45 opcode, in encode_r_type()
57 fn encode_i_type_bits(opcode: u32, rd: u32, funct3: u32, rs1: u32, offset: u32) -> u32 { in encode_i_type_bits()
59 bits |= unsigned_field_width(opcode, 7); in encode_i_type_bits()
68 pub fn encode_i_type(opcode: u32, rd: WritableReg, width: u32, rs1: Reg, offset: Imm12) -> u32 { in encode_i_type()
70 opcode, in encode_i_type()
83 pub fn encode_s_type(opcode: u32, width: u32, base: Reg, src: Reg, offset: Imm12) -> u32 { in encode_s_type()
85 bits |= unsigned_field_width(opcode, 7); in encode_s_type()
115 op.opcode(), in encode_valu()
147 op.opcode(), in encode_valu_rr_imm()
165 op.opcode(), in encode_valu_rrrr()
184 op.opcode(), in encode_valu_rrr_imm()
203 op.opcode(), in encode_valu_rr()
226 op.opcode(), in encode_valu_r_imm()
239 pub fn encode_vcfg_imm(opcode: u32, rd: Reg, imm: UImm5, vtype: &VType) -> u32 { in encode_vcfg_imm()
241 bits |= unsigned_field_width(opcode, 7); in encode_vcfg_imm()
255 opcode: u32, in encode_vmem_load()
273 bits |= unsigned_field_width(opcode, 7); in encode_vmem_load()
294 opcode: u32, in encode_vmem_store()
305 encode_vmem_load(opcode, vs3, width, rs1, sumop, masking, mop, nf) in encode_vmem_store()
311 encode_i_type(op.opcode(), rd, op.funct3(), rs, csr.bits()) in encode_csr_reg()
318 op.opcode(), in encode_csr_imm()
664 bits |= unsigned_field_width(op.opcode(), 7); in encode_fli()
675 op.opcode(), in encode_fp_rr()
693 op.opcode(), in encode_fp_rrr()
713 op.opcode(), in encode_fp_rrrr()