Lines Matching refs:WritableReg

14 use crate::machinst::isle::WritableReg;
38 rd: WritableReg, in encode_r_type() argument
68 pub fn encode_i_type(opcode: u32, rd: WritableReg, width: u32, rs1: Reg, offset: Imm12) -> u32 { in encode_i_type() argument
108 vd: WritableReg, in encode_valu() argument
139 vd: WritableReg, in encode_valu_rr_imm() argument
158 vd: WritableReg, in encode_valu_rrrr() argument
176 vd: WritableReg, in encode_valu_rrr_imm() argument
193 pub fn encode_valu_rr(op: VecAluOpRR, vd: WritableReg, vs: Reg, masking: VecOpMasking) -> u32 { in encode_valu_rr() argument
214 vd: WritableReg, in encode_valu_r_imm() argument
310 pub fn encode_csr_reg(op: CsrRegOP, rd: WritableReg, rs: Reg, csr: CSR) -> u32 { in encode_csr_reg() argument
316 pub fn encode_csr_imm(op: CsrImmOP, rd: WritableReg, csr: CSR, imm: UImm5) -> u32 { in encode_csr_imm() argument
330 pub fn encode_cr_type(op: CrOp, rd: WritableReg, rs2: Reg) -> u16 { in encode_cr_type() argument
344 encode_cr_type(op, WritableReg::from_reg(rs1), zero_reg()) in encode_cr2_type()
351 pub fn encode_ca_type(op: CaOp, rd: WritableReg, rs2: Reg) -> u16 { in encode_ca_type() argument
396 pub fn encode_ci_type(op: CiOp, rd: WritableReg, imm: Imm6) -> u16 { in encode_ci_type() argument
410 pub fn encode_ci_sp_load(op: CiOp, rd: WritableReg, imm: Uimm6) -> u16 { in encode_ci_sp_load() argument
463 pub fn encode_ciw_type(op: CiwOp, rd: WritableReg, imm: u8) -> u16 { in encode_ciw_type() argument
485 pub fn encode_cb_type(op: CbOp, rd: WritableReg, imm: Imm6) -> u16 { in encode_cb_type() argument
554 pub fn encode_cl_type(op: ClOp, dest: WritableReg, base: Reg, imm: Uimm5) -> u16 { in encode_cl_type() argument
611 pub fn encode_cszn_type(op: CsznOp, rd: WritableReg) -> u16 { in encode_cszn_type()
648 pub fn encode_zcbmem_load(op: ZcbMemOp, rd: WritableReg, base: Reg, imm: Uimm2) -> u16 { in encode_zcbmem_load() argument
656 pub fn encode_fli(width: FpuOPWidth, imm: FliConstant, rd: WritableReg) -> u32 { in encode_fli()
673 pub fn encode_fp_rr(op: FpuOPRR, width: FpuOPWidth, frm: FRM, rd: WritableReg, rs: Reg) -> u32 { in encode_fp_rr() argument
688 rd: WritableReg, in encode_fp_rrr() argument
706 rd: WritableReg, in encode_fp_rrrr() argument