Lines Matching refs:op
34 struct op { struct
35 struct op *next; argument
50 struct op *first_op; argument
51 struct op **last_op;
112 exec_op(struct op *op, struct pci_dev *dev) in exec_op() argument
118 int width = op->width; in exec_op()
123 if (op->cap_type) in exec_op()
126 unsigned int cap_nr = op->number; in exec_op()
127 cap = pci_find_cap_nr(dev, op->cap_id, op->cap_type, &cap_nr); in exec_op()
132 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"), in exec_op()
133 op->cap_id); in exec_op()
136 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"), in exec_op()
137 op->cap_id, ((cap_nr == 1) ? "is" : "are"), cap_nr, in exec_op()
140 …trace(((op->cap_type == PCI_CAP_NORMAL) ? "(cap %02x @%02x) " : "(ecap %04x @%03x) "), op->cap_id,… in exec_op()
142 addr += op->addr; in exec_op()
151 if (op->hdr_type_mask) in exec_op()
154 if (hdr_type > 2 || !((1 << hdr_type) & op->hdr_type_mask)) in exec_op()
155 die("%s: Does not have register %s.", slot, op->name); in exec_op()
158 if (op->num_values) in exec_op()
160 for (i=0; i<op->num_values; i++) in exec_op()
162 if ((op->values[i].mask & max_values[width]) == max_values[width]) in exec_op()
164 x = op->values[i].value; in exec_op()
165 trace(formats[width], op->values[i].value); in exec_op()
181 x = (y & ~op->values[i].mask) | op->values[i].value; in exec_op()
182 trace(mask_formats[width], y, op->values[i].value, op->values[i].mask, x); in exec_op()
241 struct op *op; in execute() local
242 for (op = group->first_op; op; op = op->next) in execute()
243 exec_op(op, dev); in execute()
254 struct op *op; in scan_ops() local
257 for (op = group->first_op; op; op = op->next) in scan_ops()
259 if (op->num_values && !demo_mode) in scan_ops()
612 static void parse_register(struct op *op, char *base) in parse_register() argument
617 op->cap_type = op->cap_id = 0; in parse_register()
618 if (parse_x32(base, NULL, &op->addr) > 0) in parse_register()
625 op->cap_type = PCI_CAP_NORMAL; in parse_register()
628 op->cap_type = PCI_CAP_EXTENDED; in parse_register()
631 op->cap_id = r->cap & 0xffff; in parse_register()
632 op->addr = r->offset; in parse_register()
633 op->hdr_type_mask = r->hdr_type_mask; in parse_register()
634 op->name = r->name; in parse_register()
635 if (r->width && !op->width) in parse_register()
636 op->width = r->width; in parse_register()
643 op->cap_type = PCI_CAP_NORMAL; in parse_register()
644 op->cap_id = cap; in parse_register()
645 op->addr = 0; in parse_register()
653 op->cap_type = PCI_CAP_EXTENDED; in parse_register()
654 op->cap_id = cap; in parse_register()
655 op->addr = 0; in parse_register()
667 struct op *op; in parse_op() local
693 op = xmalloc(sizeof(struct op) + n*sizeof(struct value)); in parse_op()
694 memset(op, 0, sizeof(struct op)); in parse_op()
695 *group->last_op = op; in parse_op()
696 group->last_op = &op->next; in parse_op()
697 op->num_values = n; in parse_op()
707 op->width = 1; break; in parse_op()
709 op->width = 2; break; in parse_op()
711 op->width = 4; break; in parse_op()
717 op->width = 0; in parse_op()
725 op->number = num; in parse_op()
729 op->number = 0; in parse_op()
732 parse_register(op, base); in parse_op()
733 if (!op->width) in parse_op()
742 op->addr += off; in parse_op()
746 if (op->addr >= 0x1000 || op->addr + op->width*(n ? n : 1) > 0x1000) in parse_op()
747 parse_err("Register number %02x out of range", op->addr); in parse_op()
748 if (op->addr & (op->width - 1)) in parse_op()
749 parse_err("Unaligned register address %02x", op->addr); in parse_op()
760 lim = max_values[op->width]; in parse_op()
763 op->values[j].value = ll; in parse_op()
770 op->values[j].mask = ll; in parse_op()
771 op->values[j].value &= ll; in parse_op()
774 op->values[j].mask = ~0U; in parse_op()