Lines Matching refs:w
129 u16 w; in cap_aer() local
226 w = get_conf_word(d, where + PCI_ERR_ROOT_COR_SRC); in cap_aer()
227 printf("\t\tErrorSrc: ERR_COR: %04x ", w); in cap_aer()
229 w = get_conf_word(d, where + PCI_ERR_ROOT_SRC); in cap_aer()
230 printf("ERR_FATAL/NONFATAL: %04x\n", w); in cap_aer()
268 u16 w; in cap_acs() local
277 w = get_conf_word(d, where + PCI_ACS_CAP); in cap_acs()
280 FLAG(w, PCI_ACS_CAP_VALID), FLAG(w, PCI_ACS_CAP_BLOCK), FLAG(w, PCI_ACS_CAP_REQ_RED), in cap_acs()
281 FLAG(w, PCI_ACS_CAP_CMPLT_RED), FLAG(w, PCI_ACS_CAP_FORWARD), FLAG(w, PCI_ACS_CAP_EGRESS), in cap_acs()
282 FLAG(w, PCI_ACS_CAP_TRANS)); in cap_acs()
283 w = get_conf_word(d, where + PCI_ACS_CTRL); in cap_acs()
286 FLAG(w, PCI_ACS_CTRL_VALID), FLAG(w, PCI_ACS_CTRL_BLOCK), FLAG(w, PCI_ACS_CTRL_REQ_RED), in cap_acs()
287 FLAG(w, PCI_ACS_CTRL_CMPLT_RED), FLAG(w, PCI_ACS_CTRL_FORWARD), FLAG(w, PCI_ACS_CTRL_EGRESS), in cap_acs()
288 FLAG(w, PCI_ACS_CTRL_TRANS)); in cap_acs()
294 u16 w; in cap_ari() local
303 w = get_conf_word(d, where + PCI_ARI_CAP); in cap_ari()
305 FLAG(w, PCI_ARI_CAP_MFVC), FLAG(w, PCI_ARI_CAP_ACS), in cap_ari()
306 PCI_ARI_CAP_NFN(w)); in cap_ari()
307 w = get_conf_word(d, where + PCI_ARI_CTRL); in cap_ari()
309 FLAG(w, PCI_ARI_CTRL_MFVC), FLAG(w, PCI_ARI_CTRL_ACS), in cap_ari()
310 PCI_ARI_CTRL_FG(w)); in cap_ari()
316 u16 w; in cap_ats() local
325 w = get_conf_word(d, where + PCI_ATS_CAP); in cap_ats()
326 printf("\t\tATSCap:\tInvalidate Queue Depth: %02x\n", PCI_ATS_CAP_IQD(w)); in cap_ats()
327 w = get_conf_word(d, where + PCI_ATS_CTRL); in cap_ats()
329 FLAG(w, PCI_ATS_CTRL_ENABLE), PCI_ATS_CTRL_STU(w)); in cap_ats()
335 u16 w; in cap_pri() local
345 w = get_conf_word(d, where + PCI_PRI_CTRL); in cap_pri()
347 FLAG(w, PCI_PRI_CTRL_ENABLE), FLAG(w, PCI_PRI_CTRL_RESET)); in cap_pri()
348 w = get_conf_word(d, where + PCI_PRI_STATUS); in cap_pri()
350 FLAG(w, PCI_PRI_STATUS_RF), FLAG(w, PCI_PRI_STATUS_UPRGI), in cap_pri()
351 FLAG(w, PCI_PRI_STATUS_STOPPED), FLAG(w, PCI_PRI_STATUS_PASID)); in cap_pri()
361 u16 w; in cap_pasid() local
370 w = get_conf_word(d, where + PCI_PASID_CAP); in cap_pasid()
372 FLAG(w, PCI_PASID_CAP_EXEC), FLAG(w, PCI_PASID_CAP_PRIV), in cap_pasid()
373 PCI_PASID_CAP_WIDTH(w)); in cap_pasid()
374 w = get_conf_word(d, where + PCI_PASID_CTRL); in cap_pasid()
376 FLAG(w, PCI_PASID_CTRL_ENABLE), FLAG(w, PCI_PASID_CTRL_EXEC), in cap_pasid()
377 FLAG(w, PCI_PASID_CTRL_PRIV)); in cap_pasid()
384 u16 w; in cap_sriov() local
398 w = get_conf_word(d, where + PCI_IOV_CTRL); in cap_sriov()
400 FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME), in cap_sriov()
401 FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE), in cap_sriov()
402 FLAG(w, PCI_IOV_CTRL_ARI), FLAG(w, PCI_IOV_CTRL_VF_10BIT_TAG_REQ_EN)); in cap_sriov()
403 w = get_conf_word(d, where + PCI_IOV_STATUS); in cap_sriov()
404 printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS)); in cap_sriov()
405 w = get_conf_word(d, where + PCI_IOV_INITIALVF); in cap_sriov()
406 printf("\t\tInitial VFs: %d, ", w); in cap_sriov()
407 w = get_conf_word(d, where + PCI_IOV_TOTALVF); in cap_sriov()
408 printf("Total VFs: %d, ", w); in cap_sriov()
409 w = get_conf_word(d, where + PCI_IOV_NUMVF); in cap_sriov()
410 printf("Number of VFs: %d, ", w); in cap_sriov()
413 w = get_conf_word(d, where + PCI_IOV_OFFSET); in cap_sriov()
414 printf("\t\tVF offset: %d, ", w); in cap_sriov()
415 w = get_conf_word(d, where + PCI_IOV_STRIDE); in cap_sriov()
416 printf("stride: %d, ", w); in cap_sriov()
417 w = get_conf_word(d, where + PCI_IOV_DID); in cap_sriov()
418 printf("Device ID: %04x\n", w); in cap_sriov()
457 u16 w; in cap_multicast() local
468 w = get_conf_word(d, where + PCI_MCAST_CAP); in cap_multicast()
469 printf("\t\tMcastCap: MaxGroups %d", PCI_MCAST_CAP_MAX_GROUP(w) + 1); in cap_multicast()
472 PCI_MCAST_CAP_WIN_SIZE(w), 1 << PCI_MCAST_CAP_WIN_SIZE(w)); in cap_multicast()
475 printf(", ECRCRegen%c\n", FLAG(w, PCI_MCAST_CAP_ECRC)); in cap_multicast()
476 w = get_conf_word(d, where + PCI_MCAST_CTRL); in cap_multicast()
478 PCI_MCAST_CTRL_NUM_GROUP(w) + 1, FLAG(w, PCI_MCAST_CTRL_ENABLE)); in cap_multicast()
851 u16 w; in cxl_range() local
853 w = (u16) size; in cxl_range()
859 FLAG(w, PCI_CXL_RANGE_VALID), FLAG(w, PCI_CXL_RANGE_ACTIVE), in cxl_range()
860 type[PCI_CXL_RANGE_TYPE(w)], class[PCI_CXL_RANGE_CLASS(w)], in cxl_range()
861 interleave[PCI_CXL_RANGE_INTERLEAVE(w)], in cxl_range()
862 1 << (PCI_CXL_RANGE_TIMEOUT(w) * 2)); in cxl_range()
870 u16 w; in dvsec_cxl_device() local
878 w = get_conf_word(d, where + PCI_CXL_DEV_CAP); in dvsec_cxl_device()
880 FLAG(w, PCI_CXL_DEV_CAP_CACHE), FLAG(w, PCI_CXL_DEV_CAP_IO), FLAG(w, PCI_CXL_DEV_CAP_MEM), in dvsec_cxl_device()
881 FLAG(w, PCI_CXL_DEV_CAP_MEM_HWINIT), PCI_CXL_DEV_CAP_HDM_CNT(w), FLAG(w, PCI_CXL_DEV_CAP_VIRAL)); in dvsec_cxl_device()
883 w = get_conf_word(d, where + PCI_CXL_DEV_CTRL); in dvsec_cxl_device()
885 FLAG(w, PCI_CXL_DEV_CTRL_CACHE), FLAG(w, PCI_CXL_DEV_CTRL_IO), FLAG(w, PCI_CXL_DEV_CTRL_MEM), in dvsec_cxl_device()
886 …PCI_CXL_DEV_CTRL_CACHE_SF_COV(w), PCI_CXL_DEV_CTRL_CACHE_SF_GRAN(w), FLAG(w, PCI_CXL_DEV_CTRL_CACH… in dvsec_cxl_device()
887 FLAG(w, PCI_CXL_DEV_CTRL_VIRAL)); in dvsec_cxl_device()
889 w = get_conf_word(d, where + PCI_CXL_DEV_STATUS); in dvsec_cxl_device()
890 printf("\t\tCXLSta:\tViral%c\n", FLAG(w, PCI_CXL_DEV_STATUS_VIRAL)); in dvsec_cxl_device()
892 w = get_conf_word(d, where + PCI_CXL_DEV_CTRL2); in dvsec_cxl_device()
894 FLAG(w, PCI_CXL_DEV_CTRL2_DISABLE_CACHING), in dvsec_cxl_device()
895 FLAG(w, PCI_CXL_DEV_CTRL2_INIT_WB_INVAL), in dvsec_cxl_device()
896 FLAG(w, PCI_CXL_DEV_CTRL2_INIT_CXL_RST), in dvsec_cxl_device()
897 FLAG(w, PCI_CXL_DEV_CTRL2_INIT_CXL_RST_CLR_EN)); in dvsec_cxl_device()
899 …printf(" DesiredVolatileHDMStateAfterHotReset%c", FLAG(w, PCI_CXL_DEV_CTRL2_INIT_CXL_HDM_STATE_HOT… in dvsec_cxl_device()
902 w = get_conf_word(d, where + PCI_CXL_DEV_STATUS2); in dvsec_cxl_device()
904 FLAG(w, PCI_CXL_DEV_STATUS_RC), FLAG(w,PCI_CXL_DEV_STATUS_RE), FLAG(w, PCI_CXL_DEV_STATUS_PMC)); in dvsec_cxl_device()
906 w = get_conf_word(d, where + PCI_CXL_DEV_CAP2); in dvsec_cxl_device()
908 cache_unit_size = BITS(w, 0, 4); in dvsec_cxl_device()
909 cache_size = BITS(w, 8, 8); in dvsec_cxl_device()
941 w = get_conf_word(d, where + PCI_CXL_DEV_CAP3); in dvsec_cxl_device()
943 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_COLD), in dvsec_cxl_device()
944 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_WARM), in dvsec_cxl_device()
945 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_HOT), in dvsec_cxl_device()
946 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_HOT_CFG)); in dvsec_cxl_device()
957 u16 w, m1, m2; in dvsec_cxl_port() local
963 w = get_conf_word(d, where + PCI_CXL_PORT_EXT_STATUS); in dvsec_cxl_port()
964 printf("\t\tCXLPortSta:\tPMComplete%c\n", FLAG(w, PCI_CXL_PORT_EXT_STATUS)); in dvsec_cxl_port()
966 w = get_conf_word(d, where + PCI_CXL_PORT_CTRL); in dvsec_cxl_port()
968 FLAG(w, PCI_CXL_PORT_UNMASK_SBR), FLAG(w, PCI_CXL_PORT_UNMASK_LINK), in dvsec_cxl_port()
969 FLAG(w, PCI_CXL_PORT_ALT_MEMORY), FLAG(w, PCI_CXL_PORT_ALT_BME), in dvsec_cxl_port()
970 FLAG(w, PCI_CXL_PORT_VIRAL_EN)); in dvsec_cxl_port()
1023 u16 w, duration; in dvsec_cxl_gpf_device() local
1026 w = get_conf_word(d, where + PCI_CXL_GPF_DEV_PHASE2_DUR); in dvsec_cxl_gpf_device()
1027 time_base = BITS(w, 0, 4); in dvsec_cxl_gpf_device()
1028 time_scale = BITS(w, 8, 4); in dvsec_cxl_gpf_device()
1064 u16 w, timeout; in dvsec_cxl_gpf_port() local
1067 w = get_conf_word(d, where + PCI_CXL_GPF_PORT_PHASE1_CTRL); in dvsec_cxl_gpf_port()
1068 time_base = BITS(w, 0, 4); in dvsec_cxl_gpf_port()
1069 time_scale = BITS(w, 8, 4); in dvsec_cxl_gpf_port()
1098 w = get_conf_word(d, where + PCI_CXL_GPF_PORT_PHASE2_CTRL); in dvsec_cxl_gpf_port()
1099 time_base = BITS(w, 0, 4); in dvsec_cxl_gpf_port()
1100 time_scale = BITS(w, 8, 4); in dvsec_cxl_gpf_port()
1133 u16 w; in dvsec_cxl_flex_bus() local
1155 w = get_conf_word(d, where + PCI_CXL_FB_PORT_CAP); in dvsec_cxl_flex_bus()
1157 FLAG(w, PCI_CXL_FB_CAP_CACHE), FLAG(w, PCI_CXL_FB_CAP_IO), in dvsec_cxl_flex_bus()
1158 FLAG(w, PCI_CXL_FB_CAP_MEM), FLAG(w, PCI_CXL_FB_CAP_68B_FLIT), in dvsec_cxl_flex_bus()
1159 FLAG(w, PCI_CXL_FB_CAP_MULT_LOG_DEV)); in dvsec_cxl_flex_bus()
1163 FLAG(w, PCI_CXL_FB_CAP_256B_FLIT), FLAG(w, PCI_CXL_FB_CAP_PBR_FLIT)); in dvsec_cxl_flex_bus()
1165 w = get_conf_word(d, where + PCI_CXL_FB_PORT_CTRL); in dvsec_cxl_flex_bus()
1167 FLAG(w, PCI_CXL_FB_CTRL_CACHE), FLAG(w, PCI_CXL_FB_CTRL_IO), in dvsec_cxl_flex_bus()
1168 FLAG(w, PCI_CXL_FB_CTRL_MEM), FLAG(w, PCI_CXL_FB_CTRL_SYNC_HDR_BYP), in dvsec_cxl_flex_bus()
1169 FLAG(w, PCI_CXL_FB_CTRL_DRFT_BUF), FLAG(w, PCI_CXL_FB_CTRL_68B_FLIT), in dvsec_cxl_flex_bus()
1170 FLAG(w, PCI_CXL_FB_CTRL_MULT_LOG_DEV), FLAG(w, PCI_CXL_FB_CTRL_RCD), in dvsec_cxl_flex_bus()
1171 FLAG(w, PCI_CXL_FB_CTRL_RETIMER1), FLAG(w, PCI_CXL_FB_CTRL_RETIMER2)); in dvsec_cxl_flex_bus()
1175 FLAG(w, PCI_CXL_FB_CTRL_256B_FLIT), FLAG(w, PCI_CXL_FB_CTRL_PBR_FLIT)); in dvsec_cxl_flex_bus()
1177 w = get_conf_word(d, where + PCI_CXL_FB_PORT_STATUS); in dvsec_cxl_flex_bus()
1179 FLAG(w, PCI_CXL_FB_STAT_CACHE), FLAG(w, PCI_CXL_FB_STAT_IO), in dvsec_cxl_flex_bus()
1180 FLAG(w, PCI_CXL_FB_STAT_MEM), FLAG(w, PCI_CXL_FB_STAT_SYNC_HDR_BYP), in dvsec_cxl_flex_bus()
1181 FLAG(w, PCI_CXL_FB_STAT_DRFT_BUF), FLAG(w, PCI_CXL_FB_STAT_68B_FLIT), in dvsec_cxl_flex_bus()
1182 FLAG(w, PCI_CXL_FB_STAT_MULT_LOG_DEV)); in dvsec_cxl_flex_bus()
1186 FLAG(w, PCI_CXL_FB_STAT_256B_FLIT), FLAG(w, PCI_CXL_FB_STAT_PBR_FLIT)); in dvsec_cxl_flex_bus()
1221 u16 w; in dvsec_cxl_mld() local
1223 w = get_conf_word(d, where + PCI_CXL_MLD_NUM_LD); in dvsec_cxl_mld()
1226 if (w && w <= PCI_CXL_MLD_MAX_LD) in dvsec_cxl_mld()
1227 printf("\t\tNumLogDevs: %d\n", w); in dvsec_cxl_mld()