Lines Matching refs:u32

19   u32 tph_cap;  in cap_tph()
52 static u32
61 u32 scale; in cap_ltr()
84 u32 ctrl3, lane_err_stat; in cap_sec()
115 u32 t1, t2; in cap_dsn()
128 u32 l, l0, l1, l2, l3; in cap_aer()
336 u32 l; in cap_pri()
385 u32 l; in cap_sriov()
426 u32 addr; in cap_sriov()
428 u32 h; in cap_sriov()
458 u32 l; in cap_multicast()
513 u32 cr1, cr2; in cap_vc()
559 u32 rcap, rctrl; in cap_vc()
602 u32 esd; in cap_rclink()
625 u32 desc; in cap_rclink()
626 u32 addr_lo, addr_hi; in cap_rclink()
671 u32 hdr = get_conf_long(d, where); in cap_rcec()
673 u32 bmap = get_conf_long(d, where + PCI_RCEC_RCIEP_BMAP); in cap_rcec()
706 u32 busn = get_conf_long(d, where + PCI_RCEC_BUSN_REG); in cap_rcec()
749 u32 status = get_conf_long(d, where + PCI_16GT_STATUS); in cap_phy_16gt()
785 u32 cap = get_conf_long(d, where + PCI_32GT_CAP); in cap_phy_32gt()
786 u32 ctl = get_conf_long(d, where + PCI_32GT_CTL); in cap_phy_32gt()
787 u32 status = get_conf_long(d, where + PCI_32GT_STATUS); in cap_phy_32gt()
831 u32 status = get_conf_long(d, where + PCI_64GT_STATUS); in cap_phy_64gt()
848 u32 interleave[] = { 0, 256, 4096, 512, 1024, 2048, 8192, 16384 }; in cxl_range()
868 u32 cache_size, cache_unit_size; in dvsec_cxl_device()
997 u32 lo = get_conf_long(d, pos); in dvsec_cxl_register_locator()
998 u32 hi = get_conf_long(d, pos + 4); in dvsec_cxl_register_locator()
1022 u32 l; in dvsec_cxl_gpf_device()
1134 u32 l, data; in dvsec_cxl_flex_bus()
1321 u32 hdr = get_conf_long(d, where + PCI_DVSEC_HEADER1); in cap_dvsec()
1338 u32 hdr; in cap_evendor()
1371 u32 l1_cap, val, scale; in cap_l1pm()
1442 u32 buff; in cap_ptm()
1524 u32 sizes_buffer, control_buffer, ext_sizes, current_size; in cap_rebar()
1590 u32 l; in cap_doe()
1622 static const char *offstr(char *buf, u32 off) in offstr()
1631 static const char *ide_alg(char *buf, size_t len, u32 l) in ide_alg()
1648 u32 l, l2, linknum = 0, selnum = 0, addrnum, off, i, j; in cap_ide()
1859 u32 devcap3; in cap_dev3()
1921 u32 header; in show_ext_caps()