Lines Matching refs:FLAG
95 FLAG(ctrl3, PCI_SEC_LNKCTL3_LNK_EQU_REQ_INTR_EN), in cap_sec()
96 FLAG(ctrl3, PCI_SEC_LNKCTL3_PERFORM_LINK_EQU)); in cap_sec()
142 FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP), in cap_aer()
143 FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT), in cap_aer()
144 FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP), in cap_aer()
145 FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL), in cap_aer()
146 FLAG(l, PCI_ERR_UNC_INTERNAL), FLAG(l, PCI_ERR_UNC_MC_BLOCKED_TLP), in cap_aer()
147 FLAG(l, PCI_ERR_UNC_ATOMICOP_EGRESS_BLOCKED), FLAG(l, PCI_ERR_UNC_TLP_PREFIX_BLOCKED), in cap_aer()
148 FLAG(l, PCI_ERR_UNC_POISONED_TLP_EGRESS), FLAG(l, PCI_ERR_UNC_DMWR_REQ_EGRESS_BLOCKED), in cap_aer()
149 FLAG(l, PCI_ERR_UNC_IDE_CHECK), FLAG(l, PCI_ERR_UNC_MISR_IDE_TLP), FLAG(l, PCI_ERR_UNC_PCRC_CHECK), in cap_aer()
150 FLAG(l, PCI_ERR_UNC_TLP_XLAT_EGRESS_BLOCKED)); in cap_aer()
155 FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP), in cap_aer()
156 FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT), in cap_aer()
157 FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP), in cap_aer()
158 FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL), in cap_aer()
159 FLAG(l, PCI_ERR_UNC_INTERNAL), FLAG(l, PCI_ERR_UNC_MC_BLOCKED_TLP), in cap_aer()
160 FLAG(l, PCI_ERR_UNC_ATOMICOP_EGRESS_BLOCKED), FLAG(l, PCI_ERR_UNC_TLP_PREFIX_BLOCKED), in cap_aer()
161 FLAG(l, PCI_ERR_UNC_POISONED_TLP_EGRESS), FLAG(l, PCI_ERR_UNC_DMWR_REQ_EGRESS_BLOCKED), in cap_aer()
162 FLAG(l, PCI_ERR_UNC_IDE_CHECK), FLAG(l, PCI_ERR_UNC_MISR_IDE_TLP), FLAG(l, PCI_ERR_UNC_PCRC_CHECK), in cap_aer()
163 FLAG(l, PCI_ERR_UNC_TLP_XLAT_EGRESS_BLOCKED)); in cap_aer()
168 FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP), in cap_aer()
169 FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT), in cap_aer()
170 FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP), in cap_aer()
171 FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL), in cap_aer()
172 FLAG(l, PCI_ERR_UNC_INTERNAL), FLAG(l, PCI_ERR_UNC_MC_BLOCKED_TLP), in cap_aer()
173 FLAG(l, PCI_ERR_UNC_ATOMICOP_EGRESS_BLOCKED), FLAG(l, PCI_ERR_UNC_TLP_PREFIX_BLOCKED), in cap_aer()
174 FLAG(l, PCI_ERR_UNC_POISONED_TLP_EGRESS), FLAG(l, PCI_ERR_UNC_DMWR_REQ_EGRESS_BLOCKED), in cap_aer()
175 FLAG(l, PCI_ERR_UNC_IDE_CHECK), FLAG(l, PCI_ERR_UNC_MISR_IDE_TLP), FLAG(l, PCI_ERR_UNC_PCRC_CHECK), in cap_aer()
176 FLAG(l, PCI_ERR_UNC_TLP_XLAT_EGRESS_BLOCKED)); in cap_aer()
180 FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP), in cap_aer()
181 FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE), in cap_aer()
182 FLAG(l, PCI_ERR_COR_INTERNAL), FLAG(l, PCI_ERR_COR_HDRLOG_OVER)); in cap_aer()
186 FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP), in cap_aer()
187 FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE), in cap_aer()
188 FLAG(l, PCI_ERR_COR_INTERNAL), FLAG(l, PCI_ERR_COR_HDRLOG_OVER)); in cap_aer()
192 PCI_ERR_CAP_FEP(l), FLAG(l, PCI_ERR_CAP_ECRC_GENC), FLAG(l, PCI_ERR_CAP_ECRC_GENE), in cap_aer()
193 FLAG(l, PCI_ERR_CAP_ECRC_CHKC), FLAG(l, PCI_ERR_CAP_ECRC_CHKE), in cap_aer()
194 FLAG(l, PCI_ERR_CAP_MULT_HDRC), FLAG(l, PCI_ERR_CAP_MULT_HDRE), in cap_aer()
195 FLAG(l, PCI_ERR_CAP_TLP_PFX), FLAG(l, PCI_ERR_CAP_HDR_LOG)); in cap_aer()
210 FLAG(l, PCI_ERR_ROOT_CMD_COR_EN), in cap_aer()
211 FLAG(l, PCI_ERR_ROOT_CMD_NONFATAL_EN), in cap_aer()
212 FLAG(l, PCI_ERR_ROOT_CMD_FATAL_EN)); in cap_aer()
217 FLAG(l, PCI_ERR_ROOT_COR_RCV), in cap_aer()
218 FLAG(l, PCI_ERR_ROOT_MULTI_COR_RCV), in cap_aer()
219 FLAG(l, PCI_ERR_ROOT_UNCOR_RCV), in cap_aer()
220 FLAG(l, PCI_ERR_ROOT_MULTI_UNCOR_RCV), in cap_aer()
221 FLAG(l, PCI_ERR_ROOT_FIRST_FATAL), in cap_aer()
222 FLAG(l, PCI_ERR_ROOT_NONFATAL_RCV), in cap_aer()
223 FLAG(l, PCI_ERR_ROOT_FATAL_RCV), in cap_aer()
247 PCI_DPC_CAP_INT_MSG(l), FLAG(l, PCI_DPC_CAP_RP_EXT), FLAG(l, PCI_DPC_CAP_TLP_BLOCK), in cap_dpc()
248 FLAG(l, PCI_DPC_CAP_SW_TRIGGER), PCI_DPC_CAP_RP_LOG(l), FLAG(l, PCI_DPC_CAP_DL_ACT_ERR)); in cap_dpc()
252 PCI_DPC_CTL_TRIGGER(l), FLAG(l, PCI_DPC_CTL_CMPL), FLAG(l, PCI_DPC_CTL_INT), in cap_dpc()
253 FLAG(l, PCI_DPC_CTL_ERR_COR), FLAG(l, PCI_DPC_CTL_TLP), FLAG(l, PCI_DPC_CTL_SW_TRIGGER), in cap_dpc()
254 FLAG(l, PCI_DPC_CTL_DL_ACTIVE)); in cap_dpc()
258 FLAG(l, PCI_DPC_STS_TRIGGER), PCI_DPC_STS_REASON(l), FLAG(l, PCI_DPC_STS_INT), in cap_dpc()
259 FLAG(l, PCI_DPC_STS_RP_BUSY), PCI_DPC_STS_TRIGGER_EXT(l), PCI_DPC_STS_PIO_FEP(l)); in cap_dpc()
280 FLAG(w, PCI_ACS_CAP_VALID), FLAG(w, PCI_ACS_CAP_BLOCK), FLAG(w, PCI_ACS_CAP_REQ_RED), in cap_acs()
281 FLAG(w, PCI_ACS_CAP_CMPLT_RED), FLAG(w, PCI_ACS_CAP_FORWARD), FLAG(w, PCI_ACS_CAP_EGRESS), in cap_acs()
282 FLAG(w, PCI_ACS_CAP_TRANS)); in cap_acs()
286 FLAG(w, PCI_ACS_CTRL_VALID), FLAG(w, PCI_ACS_CTRL_BLOCK), FLAG(w, PCI_ACS_CTRL_REQ_RED), in cap_acs()
287 FLAG(w, PCI_ACS_CTRL_CMPLT_RED), FLAG(w, PCI_ACS_CTRL_FORWARD), FLAG(w, PCI_ACS_CTRL_EGRESS), in cap_acs()
288 FLAG(w, PCI_ACS_CTRL_TRANS)); in cap_acs()
305 FLAG(w, PCI_ARI_CAP_MFVC), FLAG(w, PCI_ARI_CAP_ACS), in cap_ari()
309 FLAG(w, PCI_ARI_CTRL_MFVC), FLAG(w, PCI_ARI_CTRL_ACS), in cap_ari()
329 FLAG(w, PCI_ATS_CTRL_ENABLE), PCI_ATS_CTRL_STU(w)); in cap_ats()
347 FLAG(w, PCI_PRI_CTRL_ENABLE), FLAG(w, PCI_PRI_CTRL_RESET)); in cap_pri()
350 FLAG(w, PCI_PRI_STATUS_RF), FLAG(w, PCI_PRI_STATUS_UPRGI), in cap_pri()
351 FLAG(w, PCI_PRI_STATUS_STOPPED), FLAG(w, PCI_PRI_STATUS_PASID)); in cap_pri()
372 FLAG(w, PCI_PASID_CAP_EXEC), FLAG(w, PCI_PASID_CAP_PRIV), in cap_pasid()
376 FLAG(w, PCI_PASID_CTRL_ENABLE), FLAG(w, PCI_PASID_CTRL_EXEC), in cap_pasid()
377 FLAG(w, PCI_PASID_CTRL_PRIV)); in cap_pasid()
397 FLAG(l, PCI_IOV_CAP_VFM), FLAG(l, PCI_IOV_CAP_VF_10BIT_TAG_REQ), PCI_IOV_CAP_IMN(l)); in cap_sriov()
400 FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME), in cap_sriov()
401 FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE), in cap_sriov()
402 FLAG(w, PCI_IOV_CTRL_ARI), FLAG(w, PCI_IOV_CTRL_VF_10BIT_TAG_REQ_EN)); in cap_sriov()
404 printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS)); in cap_sriov()
475 printf(", ECRCRegen%c\n", FLAG(w, PCI_MCAST_CAP_ECRC)); in cap_multicast()
478 PCI_MCAST_CTRL_NUM_GROUP(w) + 1, FLAG(w, PCI_MCAST_CTRL_ENABLE)); in cap_multicast()
544 printf("%c%s%c", (i ? ' ' : '\t'), arb_selects[i], FLAG(cr2, 1 << i)); in cap_vc()
548 printf("\t\tStatus:\tInProgress%c\n", FLAG(status, 1)); in cap_vc()
577 FLAG(rcap, 1 << 15)); in cap_vc()
582 printf("%c%s%c", (j ? ' ' : '\t'), vc_arb_selects[j], FLAG(rcap, 1 << j)); in cap_vc()
585 FLAG(rctrl, 1 << 31), in cap_vc()
591 FLAG(rstatus, 2), in cap_vc()
592 FLAG(rstatus, 1)); in cap_vc()
641 FLAG(desc, 4), in cap_rclink()
643 FLAG(desc, 1)); in cap_rclink()
730 printf("\t\tPortCap: Uses Driver%c\n", FLAG(port_caps, PCI_LMR_CAPS_DRVR)); in cap_lmr()
732 FLAG(port_status, PCI_LMR_PORT_STS_READY), in cap_lmr()
733 FLAG(port_status, PCI_LMR_PORT_STS_SOFT_READY)); in cap_lmr()
752 FLAG(status, PCI_16GT_STATUS_EQU_COMP), in cap_phy_16gt()
753 FLAG(status, PCI_16GT_STATUS_EQU_PHASE1), in cap_phy_16gt()
754 FLAG(status, PCI_16GT_STATUS_EQU_PHASE2), in cap_phy_16gt()
755 FLAG(status, PCI_16GT_STATUS_EQU_PHASE3), in cap_phy_16gt()
756 FLAG(status, PCI_16GT_STATUS_EQU_REQ)); in cap_phy_16gt()
791 FLAG(cap, PCI_32GT_CAP_EQU_BYPASS), in cap_phy_32gt()
792 FLAG(cap, PCI_32GT_CAP_NO_EQU_NEEDED), in cap_phy_32gt()
793 FLAG(cap, PCI_32GT_CAP_MOD_TS_MODE_0), in cap_phy_32gt()
794 FLAG(cap, PCI_32GT_CAP_MOD_TS_MODE_1), in cap_phy_32gt()
795 FLAG(cap, PCI_32GT_CAP_MOD_TS_MODE_2)); in cap_phy_32gt()
799 FLAG(ctl, PCI_32GT_CTL_EQU_BYPASS_DIS), in cap_phy_32gt()
800 FLAG(ctl, PCI_32GT_CTL_NO_EQU_NEEDED_DIS), in cap_phy_32gt()
806 FLAG(status, PCI_32GT_STATUS_EQU_COMP), in cap_phy_32gt()
807 FLAG(status, PCI_32GT_STATUS_EQU_PHASE1), in cap_phy_32gt()
808 FLAG(status, PCI_32GT_STATUS_EQU_PHASE2), in cap_phy_32gt()
809 FLAG(status, PCI_32GT_STATUS_EQU_PHASE3), in cap_phy_32gt()
810 FLAG(status, PCI_32GT_STATUS_EQU_REQ), in cap_phy_32gt()
812 FLAG(status, PCI_32GT_STATUS_MOD_TS), in cap_phy_32gt()
813 FLAG(status, PCI_32GT_STATUS_TX_PRE_ON), in cap_phy_32gt()
814 FLAG(status, PCI_32GT_STATUS_TX_PRE_REQ), in cap_phy_32gt()
815 FLAG(status, PCI_32GT_STATUS_NO_EQU)); in cap_phy_32gt()
835 FLAG(status, PCI_64GT_STATUS_EQU_COMP), in cap_phy_64gt()
836 FLAG(status, PCI_64GT_STATUS_EQU_PHASE1), in cap_phy_64gt()
837 FLAG(status, PCI_64GT_STATUS_EQU_PHASE2), in cap_phy_64gt()
838 FLAG(status, PCI_64GT_STATUS_EQU_PHASE3), in cap_phy_64gt()
839 FLAG(status, PCI_64GT_STATUS_EQU_REQ), in cap_phy_64gt()
840 FLAG(status, PCI_64GT_STATUS_TX_PRE_ON), in cap_phy_64gt()
841 FLAG(status, PCI_64GT_STATUS_TX_PRE_REQ), in cap_phy_64gt()
842 FLAG(status, PCI_64GT_STATUS_NO_EQU)); in cap_phy_64gt()
859 FLAG(w, PCI_CXL_RANGE_VALID), FLAG(w, PCI_CXL_RANGE_ACTIVE), in cxl_range()
880 FLAG(w, PCI_CXL_DEV_CAP_CACHE), FLAG(w, PCI_CXL_DEV_CAP_IO), FLAG(w, PCI_CXL_DEV_CAP_MEM), in dvsec_cxl_device()
881 FLAG(w, PCI_CXL_DEV_CAP_MEM_HWINIT), PCI_CXL_DEV_CAP_HDM_CNT(w), FLAG(w, PCI_CXL_DEV_CAP_VIRAL)); in dvsec_cxl_device()
885 FLAG(w, PCI_CXL_DEV_CTRL_CACHE), FLAG(w, PCI_CXL_DEV_CTRL_IO), FLAG(w, PCI_CXL_DEV_CTRL_MEM), in dvsec_cxl_device()
886 …PCI_CXL_DEV_CTRL_CACHE_SF_COV(w), PCI_CXL_DEV_CTRL_CACHE_SF_GRAN(w), FLAG(w, PCI_CXL_DEV_CTRL_CACH… in dvsec_cxl_device()
887 FLAG(w, PCI_CXL_DEV_CTRL_VIRAL)); in dvsec_cxl_device()
890 printf("\t\tCXLSta:\tViral%c\n", FLAG(w, PCI_CXL_DEV_STATUS_VIRAL)); in dvsec_cxl_device()
894 FLAG(w, PCI_CXL_DEV_CTRL2_DISABLE_CACHING), in dvsec_cxl_device()
895 FLAG(w, PCI_CXL_DEV_CTRL2_INIT_WB_INVAL), in dvsec_cxl_device()
896 FLAG(w, PCI_CXL_DEV_CTRL2_INIT_CXL_RST), in dvsec_cxl_device()
897 FLAG(w, PCI_CXL_DEV_CTRL2_INIT_CXL_RST_CLR_EN)); in dvsec_cxl_device()
899 …printf(" DesiredVolatileHDMStateAfterHotReset%c", FLAG(w, PCI_CXL_DEV_CTRL2_INIT_CXL_HDM_STATE_HOT… in dvsec_cxl_device()
904 FLAG(w, PCI_CXL_DEV_STATUS_RC), FLAG(w,PCI_CXL_DEV_STATUS_RE), FLAG(w, PCI_CXL_DEV_STATUS_PMC)); in dvsec_cxl_device()
943 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_COLD), in dvsec_cxl_device()
944 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_WARM), in dvsec_cxl_device()
945 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_HOT), in dvsec_cxl_device()
946 FLAG(w, PCI_CXL_DEV_CAP3_HDM_STATE_RST_HOT_CFG)); in dvsec_cxl_device()
964 printf("\t\tCXLPortSta:\tPMComplete%c\n", FLAG(w, PCI_CXL_PORT_EXT_STATUS)); in dvsec_cxl_port()
968 FLAG(w, PCI_CXL_PORT_UNMASK_SBR), FLAG(w, PCI_CXL_PORT_UNMASK_LINK), in dvsec_cxl_port()
969 FLAG(w, PCI_CXL_PORT_ALT_MEMORY), FLAG(w, PCI_CXL_PORT_ALT_BME), in dvsec_cxl_port()
970 FLAG(w, PCI_CXL_PORT_VIRAL_EN)); in dvsec_cxl_port()
1157 FLAG(w, PCI_CXL_FB_CAP_CACHE), FLAG(w, PCI_CXL_FB_CAP_IO), in dvsec_cxl_flex_bus()
1158 FLAG(w, PCI_CXL_FB_CAP_MEM), FLAG(w, PCI_CXL_FB_CAP_68B_FLIT), in dvsec_cxl_flex_bus()
1159 FLAG(w, PCI_CXL_FB_CAP_MULT_LOG_DEV)); in dvsec_cxl_flex_bus()
1163 FLAG(w, PCI_CXL_FB_CAP_256B_FLIT), FLAG(w, PCI_CXL_FB_CAP_PBR_FLIT)); in dvsec_cxl_flex_bus()
1167 FLAG(w, PCI_CXL_FB_CTRL_CACHE), FLAG(w, PCI_CXL_FB_CTRL_IO), in dvsec_cxl_flex_bus()
1168 FLAG(w, PCI_CXL_FB_CTRL_MEM), FLAG(w, PCI_CXL_FB_CTRL_SYNC_HDR_BYP), in dvsec_cxl_flex_bus()
1169 FLAG(w, PCI_CXL_FB_CTRL_DRFT_BUF), FLAG(w, PCI_CXL_FB_CTRL_68B_FLIT), in dvsec_cxl_flex_bus()
1170 FLAG(w, PCI_CXL_FB_CTRL_MULT_LOG_DEV), FLAG(w, PCI_CXL_FB_CTRL_RCD), in dvsec_cxl_flex_bus()
1171 FLAG(w, PCI_CXL_FB_CTRL_RETIMER1), FLAG(w, PCI_CXL_FB_CTRL_RETIMER2)); in dvsec_cxl_flex_bus()
1175 FLAG(w, PCI_CXL_FB_CTRL_256B_FLIT), FLAG(w, PCI_CXL_FB_CTRL_PBR_FLIT)); in dvsec_cxl_flex_bus()
1179 FLAG(w, PCI_CXL_FB_STAT_CACHE), FLAG(w, PCI_CXL_FB_STAT_IO), in dvsec_cxl_flex_bus()
1180 FLAG(w, PCI_CXL_FB_STAT_MEM), FLAG(w, PCI_CXL_FB_STAT_SYNC_HDR_BYP), in dvsec_cxl_flex_bus()
1181 FLAG(w, PCI_CXL_FB_STAT_DRFT_BUF), FLAG(w, PCI_CXL_FB_STAT_68B_FLIT), in dvsec_cxl_flex_bus()
1182 FLAG(w, PCI_CXL_FB_STAT_MULT_LOG_DEV)); in dvsec_cxl_flex_bus()
1186 FLAG(w, PCI_CXL_FB_STAT_256B_FLIT), FLAG(w, PCI_CXL_FB_STAT_PBR_FLIT)); in dvsec_cxl_flex_bus()
1203 printf("\t\tFBCap2:\tNOPHint%c\n", FLAG(l, PCI_CXL_FB_CAP2_NOP_HINT)); in dvsec_cxl_flex_bus()
1206 printf("\t\tFBCtl2:\tNOPHint%c\n", FLAG(l, PCI_CXL_FB_CTRL2_NOP_HINT)); in dvsec_cxl_flex_bus()
1388 FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_PM_L12), in cap_l1pm()
1389 FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_PM_L11), in cap_l1pm()
1390 FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_ASPM_L12), in cap_l1pm()
1391 FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_ASPM_L11), in cap_l1pm()
1392 FLAG(l1_cap, PCI_L1PM_SUBSTAT_CAP_L1PM_SUPP)); in cap_l1pm()
1406 FLAG(val, PCI_L1PM_SUBSTAT_CTL1_PM_L12), in cap_l1pm()
1407 FLAG(val, PCI_L1PM_SUBSTAT_CTL1_PM_L11), in cap_l1pm()
1408 FLAG(val, PCI_L1PM_SUBSTAT_CTL1_ASPM_L12), in cap_l1pm()
1409 FLAG(val, PCI_L1PM_SUBSTAT_CTL1_ASPM_L11)); in cap_l1pm()
1459 FLAG(buff, 0x1), in cap_ptm()
1460 FLAG(buff, 0x2), in cap_ptm()
1461 FLAG(buff, 0x4)); in cap_ptm()
1480 FLAG(buff, 0x1), in cap_ptm()
1481 FLAG(buff, 0x2)); in cap_ptm()
1605 FLAG(l, PCI_DOE_CAP_INT_SUPP)); in cap_doe()
1612 FLAG(l, PCI_DOE_CTL_INT)); in cap_doe()
1616 FLAG(l, PCI_DOE_STS_BUSY), in cap_doe()
1617 FLAG(l, PCI_DOE_STS_INT), in cap_doe()
1618 FLAG(l, PCI_DOE_STS_ERROR), in cap_doe()
1619 FLAG(l, PCI_DOE_STS_OBJECT_READY)); in cap_doe()
1671 FLAG(l, PCI_IDE_CAP_FLOWTHROUGH_IDE_SUPP), in cap_ide()
1672 FLAG(l, PCI_IDE_CAP_PARTIAL_HEADER_ENC_SUPP), in cap_ide()
1673 FLAG(l, PCI_IDE_CAP_AGGREGATION_SUPP), in cap_ide()
1674 FLAG(l, PCI_IDE_CAP_PCRC_SUPP), in cap_ide()
1675 FLAG(l, PCI_IDE_CAP_IDE_KM_SUPP), in cap_ide()
1678 FLAG(l, PCI_IDE_CAP_TEE_LIMITED_SUPP) in cap_ide()
1683 FLAG(l, PCI_IDE_CTL_FLOWTHROUGH_IDE)); in cap_ide()
1703 FLAG(l, PCI_IDE_LINK_CTL_EN), in cap_ide()
1707 FLAG(l, PCI_IDE_LINK_CTL_EN), in cap_ide()
1721 FLAG(l, PCI_IDE_LINK_STS_RECVD_INTEGRITY_CHECK)); in cap_ide()
1750 FLAG(l, PCI_IDE_SEL_CTL_EN), in cap_ide()
1754 FLAG(l, PCI_IDE_SEL_CTL_PCRC_EN), in cap_ide()
1755 FLAG(l, PCI_IDE_SEL_CTL_CFG_EN), in cap_ide()
1770 FLAG(l, PCI_IDE_SEL_STS_RECVD_INTEGRITY_CHECK)); in cap_ide()
1780 FLAG(l2, PCI_IDE_SEL_RID_2_VALID), in cap_ide()
1808 FLAG(l, PCI_IDE_SEL_ADDR_1_VALID), in cap_ide()
1874 FLAG(devcap3, PCI_DEV3_DEVCAP3_DMWR_REQ), in cap_dev3()
1875 FLAG(devcap3, PCI_DEV3_DEVCAP3_14BIT_TAG_COMP), in cap_dev3()
1876 FLAG(devcap3, PCI_DEV3_DEVCAP3_14BIT_TAG_REQ), in cap_dev3()
1877 FLAG(devcap3, PCI_DEV3_DEVCAP3_L0P_SUPP)); in cap_dev3()
1885 FLAG(devcap3, PCI_DEV3_DEVCAP3_UIO_MEM_RDWR_COMP), in cap_dev3()
1886 FLAG(devcap3, PCI_DEV3_DEVCAP3_UIO_MEM_RDWR_REQ)); in cap_dev3()
1895 FLAG(devctl3, PCI_DEV3_DEVCTL3_DMWR_REQ_EN), in cap_dev3()
1896 FLAG(devctl3, PCI_DEV3_DEVCTL3_DMWR_EGRESS_BLK), in cap_dev3()
1897 FLAG(devctl3, PCI_DEV3_DEVCTL3_14BIT_TAG_REQ_EN), in cap_dev3()
1898 FLAG(devctl3, PCI_DEV3_DEVCTL3_L0P_EN), in cap_dev3()
1900 FLAG(devctl3, PCI_DEV3_DEVCTL3_UIO_MEM_RDWR_REQ_EN), in cap_dev3()
1901 FLAG(~devctl3, PCI_DEV3_DEVCTL3_UIO_REQ_256B_DIS)); in cap_dev3()
1909 FLAG(devsta3, PCI_DEV3_DEVSTA3_SEGMENT_CAPTURED), in cap_dev3()
1910 FLAG(devsta3, PCI_DEV3_DEVSTA3_REMOTE_L0P_SUPP)); in cap_dev3()