Lines Matching refs:TheDef

120         StringRef InstName = Inst->TheDef->getName();  in apply()
123 Elts.insert(Inst->TheDef); in apply()
133 return LHS->TheDef->getName() < RHS; in apply()
136 return LHS < RHS->TheDef->getName() && in apply()
137 !RHS->TheDef->getName().startswith(LHS); in apply()
148 StringRef InstName = Inst->TheDef->getName(); in apply()
150 Elts.insert(Inst->TheDef); in apply()
605 Record *SchedDef = Inst->TheDef; in collectSchedRW()
681 findRWs(CGRW.TheDef->getValueAsListOfDefs("Writes"), CGRW.Sequence, in collectSchedRW()
732 RWVec, [Def](const CodeGenSchedRW &RW) { return RW.TheDef == Def; }); in getSchedRWIdx()
738 Record *ReadDef = Read.TheDef; in hasReadOfWrite()
790 SchedRW.TheDef ? SchedRW.TheDef->getValueAsInt("Repeat") : 1; in expandRWSequence()
814 PrintFatalError(AliasRW.TheDef->getLoc(), "Multiple aliases " in expandRWSeqForProc()
817 AliasDef = AliasRW.TheDef; in expandRWSeqForProc()
829 SchedWrite.TheDef ? SchedWrite.TheDef->getValueAsInt("Repeat") : 1; in expandRWSeqForProc()
881 Record *ItinDef = Inst->TheDef->getValueAsDef("Itinerary"); in collectSchedClasses()
883 if (!Inst->TheDef->isValueUnset("SchedRW")) in collectSchedClasses()
884 findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads); in collectSchedClasses()
888 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses()
908 StringRef InstName = Inst->TheDef->getName(); in collectSchedClasses()
913 dbgs() << "No machine model for " << Inst->TheDef->getName() << '\n'; in collectSchedClasses()
919 PrintFatalError(Inst->TheDef->getLoc(), "Instruction's sched class " in collectSchedClasses()
963 dbgs() << "No machine model for " << Inst->TheDef->getName() in collectSchedClasses()
974 return InstrClassMap.lookup(Inst.TheDef); in getSchedClassIdx()
1380 RecVec Variants = SchedRW.TheDef->getValueAsListOfDefs("Variants"); in mutuallyExclusive()
1440 if (SchedRW.TheDef->getValueInit("SchedModel")->isComplete()) { in getIntersectingVariants()
1441 Record *ModelDef = SchedRW.TheDef->getValueAsDef("SchedModel"); in getIntersectingVariants()
1446 const RecVec VarDefs = SchedRW.TheDef->getValueAsListOfDefs("Variants"); in getIntersectingVariants()
1478 const RecVec VarDefs = AliasRW.TheDef->getValueAsListOfDefs("Variants"); in getIntersectingVariants()
1483 Variants.emplace_back(AliasRW.TheDef, SchedRW.Index, AliasProcIdx, 0); in getIntersectingVariants()
1511 PrintFatalError(SchedRW.TheDef->getLoc(), "No variant of this type has " in getIntersectingVariants()
1995 if (Inst->TheDef->isValueUnset("SchedRW")) { in checkCompleteness()
1996 PrintError(Inst->TheDef->getLoc(), in checkCompleteness()
1998 Inst->TheDef->getName() + "' in SchedMachineModel '" + in checkCompleteness()
2017 PrintError(Inst->TheDef->getLoc(), "'" + ProcModel.ModelName + in checkCompleteness()
2019 Inst->TheDef->getName() + "'"); in checkCompleteness()
2063 if (SchedRW.TheDef) { in collectRWResources()
2064 if (!IsRead && SchedRW.TheDef->isSubClassOf("SchedWriteRes")) { in collectRWResources()
2066 addWriteRes(SchedRW.TheDef, Idx); in collectRWResources()
2068 else if (IsRead && SchedRW.TheDef->isSubClassOf("SchedReadAdvance")) { in collectRWResources()
2070 addReadAdvance(SchedRW.TheDef, Idx); in collectRWResources()
2200 for (const Record *TheDef : UnsupportedFeaturesDefs) { in isUnsupported() local
2201 for (const Record *PredDef : Inst.TheDef->getValueAsListOfDefs("Predicates")) { in isUnsupported()
2202 if (TheDef->getName() == PredDef->getName()) in isUnsupported()