Lines Matching refs:UNROLL
3 …ctor-interleave=2 -loop-vectorize -verify-loop-info < %s | FileCheck %s --check-prefix=UNROLL-NO-VF
186 ; UNROLL-NO-VF-LABEL: @test(
187 ; UNROLL-NO-VF-NEXT: entry:
188 ; UNROLL-NO-VF-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8*
189 ; UNROLL-NO-VF-NEXT: [[AUD3:%.*]] = bitcast i32* [[AUD:%.*]] to i8*
190 ; UNROLL-NO-VF-NEXT: [[ASR6:%.*]] = bitcast i32* [[ASR:%.*]] to i8*
191 ; UNROLL-NO-VF-NEXT: [[AUR9:%.*]] = bitcast i32* [[AUR:%.*]] to i8*
192 ; UNROLL-NO-VF-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
193 ; UNROLL-NO-VF: vector.memcheck:
194 ; UNROLL-NO-VF-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128
195 ; UNROLL-NO-VF-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
196 ; UNROLL-NO-VF-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[AUD]], i64 128
197 ; UNROLL-NO-VF-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
198 ; UNROLL-NO-VF-NEXT: [[SCEVGEP7:%.*]] = getelementptr i32, i32* [[ASR]], i64 128
199 ; UNROLL-NO-VF-NEXT: [[SCEVGEP78:%.*]] = bitcast i32* [[SCEVGEP7]] to i8*
200 ; UNROLL-NO-VF-NEXT: [[SCEVGEP10:%.*]] = getelementptr i32, i32* [[AUR]], i64 128
201 ; UNROLL-NO-VF-NEXT: [[SCEVGEP1011:%.*]] = bitcast i32* [[SCEVGEP10]] to i8*
202 ; UNROLL-NO-VF-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]]
203 ; UNROLL-NO-VF-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP2]]
204 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
205 ; UNROLL-NO-VF-NEXT: [[BOUND012:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP78]]
206 ; UNROLL-NO-VF-NEXT: [[BOUND113:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP2]]
207 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT14:%.*]] = and i1 [[BOUND012]], [[BOUND113]]
208 ; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT14]]
209 ; UNROLL-NO-VF-NEXT: [[BOUND015:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP1011]]
210 ; UNROLL-NO-VF-NEXT: [[BOUND116:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP2]]
211 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT17:%.*]] = and i1 [[BOUND015]], [[BOUND116]]
212 ; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX18:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT17]]
213 ; UNROLL-NO-VF-NEXT: [[BOUND019:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP78]]
214 ; UNROLL-NO-VF-NEXT: [[BOUND120:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP45]]
215 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT21:%.*]] = and i1 [[BOUND019]], [[BOUND120]]
216 ; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX22:%.*]] = or i1 [[CONFLICT_RDX18]], [[FOUND_CONFLICT21]]
217 ; UNROLL-NO-VF-NEXT: [[BOUND023:%.*]] = icmp ult i8* [[AUD3]], [[SCEVGEP1011]]
218 ; UNROLL-NO-VF-NEXT: [[BOUND124:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP45]]
219 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT25:%.*]] = and i1 [[BOUND023]], [[BOUND124]]
220 ; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX26:%.*]] = or i1 [[CONFLICT_RDX22]], [[FOUND_CONFLICT25]]
221 ; UNROLL-NO-VF-NEXT: [[BOUND027:%.*]] = icmp ult i8* [[ASR6]], [[SCEVGEP1011]]
222 ; UNROLL-NO-VF-NEXT: [[BOUND128:%.*]] = icmp ult i8* [[AUR9]], [[SCEVGEP78]]
223 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT29:%.*]] = and i1 [[BOUND027]], [[BOUND128]]
224 ; UNROLL-NO-VF-NEXT: [[CONFLICT_RDX30:%.*]] = or i1 [[CONFLICT_RDX26]], [[FOUND_CONFLICT29]]
225 ; UNROLL-NO-VF-NEXT: br i1 [[CONFLICT_RDX30]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
226 ; UNROLL-NO-VF: vector.ph:
227 ; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]]
228 ; UNROLL-NO-VF: vector.body:
229 ; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_…
230 ; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
231 ; UNROLL-NO-VF-NEXT: [[INDUCTION31:%.*]] = add i64 [[INDEX]], 1
232 ; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION]]
233 ; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION31]]
234 ; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[INDUCTION]]
235 ; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[INDUCTION31]]
236 ; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[INDUCTION]]
237 ; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[INDUCTION31]]
238 ; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[INDUCTION]]
239 ; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[INDUCTION31]]
240 ; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !5, !noalias …
241 ; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !5, !noalias …
242 ; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP2]], align 4, !alias.scope !12, !noalia…
243 ; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP3]], align 4, !alias.scope !12, !noalia…
244 ; UNROLL-NO-VF-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP4]], align 4, !alias.scope !14, !noalia…
245 ; UNROLL-NO-VF-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP5]], align 4, !alias.scope !14, !noalia…
246 ; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP6]], align 4, !alias.scope !15
247 ; UNROLL-NO-VF-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP7]], align 4, !alias.scope !15
248 ; UNROLL-NO-VF-NEXT: [[TMP16:%.*]] = add nsw i32 [[TMP8]], 23
249 ; UNROLL-NO-VF-NEXT: [[TMP17:%.*]] = add nsw i32 [[TMP9]], 23
250 ; UNROLL-NO-VF-NEXT: [[TMP18:%.*]] = add nsw i32 [[TMP10]], 24
251 ; UNROLL-NO-VF-NEXT: [[TMP19:%.*]] = add nsw i32 [[TMP11]], 24
252 ; UNROLL-NO-VF-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP12]], 25
253 ; UNROLL-NO-VF-NEXT: [[TMP21:%.*]] = add nsw i32 [[TMP13]], 25
254 ; UNROLL-NO-VF-NEXT: [[TMP22:%.*]] = add nsw i32 [[TMP14]], 26
255 ; UNROLL-NO-VF-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP15]], 26
256 ; UNROLL-NO-VF-NEXT: [[TMP24:%.*]] = icmp slt i32 [[TMP8]], 100
257 ; UNROLL-NO-VF-NEXT: [[TMP25:%.*]] = icmp slt i32 [[TMP9]], 100
258 ; UNROLL-NO-VF-NEXT: br i1 [[TMP24]], label [[PRED_UREM_IF:%.*]], label [[PRED_UREM_CONTINUE:%.*…
259 ; UNROLL-NO-VF: pred.urem.if:
260 ; UNROLL-NO-VF-NEXT: [[TMP26:%.*]] = sdiv i32 [[TMP16]], [[TMP8]]
261 ; UNROLL-NO-VF-NEXT: [[TMP27:%.*]] = udiv i32 [[TMP18]], [[TMP10]]
262 ; UNROLL-NO-VF-NEXT: [[TMP28:%.*]] = srem i32 [[TMP20]], [[TMP12]]
263 ; UNROLL-NO-VF-NEXT: [[TMP29:%.*]] = urem i32 [[TMP22]], [[TMP14]]
264 ; UNROLL-NO-VF-NEXT: br label [[PRED_UREM_CONTINUE]]
265 ; UNROLL-NO-VF: pred.urem.continue:
266 ; UNROLL-NO-VF-NEXT: [[TMP30:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP26]], [[PRED_UR…
267 ; UNROLL-NO-VF-NEXT: [[TMP31:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP27]], [[PRED_UR…
268 ; UNROLL-NO-VF-NEXT: [[TMP32:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP28]], [[PRED_UR…
269 ; UNROLL-NO-VF-NEXT: [[TMP33:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP29]], [[PRED_UR…
270 ; UNROLL-NO-VF-NEXT: br i1 [[TMP25]], label [[PRED_UREM_IF32:%.*]], label [[PRED_UREM_CONTINUE33…
271 ; UNROLL-NO-VF: pred.urem.if32:
272 ; UNROLL-NO-VF-NEXT: [[TMP34:%.*]] = sdiv i32 [[TMP17]], [[TMP9]]
273 ; UNROLL-NO-VF-NEXT: [[TMP35:%.*]] = udiv i32 [[TMP19]], [[TMP11]]
274 ; UNROLL-NO-VF-NEXT: [[TMP36:%.*]] = srem i32 [[TMP21]], [[TMP13]]
275 ; UNROLL-NO-VF-NEXT: [[TMP37:%.*]] = urem i32 [[TMP23]], [[TMP15]]
276 ; UNROLL-NO-VF-NEXT: br label [[PRED_UREM_CONTINUE33]]
277 ; UNROLL-NO-VF: pred.urem.continue33:
278 ; UNROLL-NO-VF-NEXT: [[TMP38:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP34]], [[…
279 ; UNROLL-NO-VF-NEXT: [[TMP39:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP35]], [[…
280 ; UNROLL-NO-VF-NEXT: [[TMP40:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP36]], [[…
281 ; UNROLL-NO-VF-NEXT: [[TMP41:%.*]] = phi i32 [ poison, [[PRED_UREM_CONTINUE]] ], [ [[TMP37]], [[…
282 ; UNROLL-NO-VF-NEXT: [[TMP42:%.*]] = xor i1 [[TMP24]], true
283 ; UNROLL-NO-VF-NEXT: [[TMP43:%.*]] = xor i1 [[TMP25]], true
284 ; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP42]], i32 [[TMP16]], i32 [[TMP30]]
285 ; UNROLL-NO-VF-NEXT: [[PREDPHI34:%.*]] = select i1 [[TMP43]], i32 [[TMP17]], i32 [[TMP38]]
286 ; UNROLL-NO-VF-NEXT: [[PREDPHI35:%.*]] = select i1 [[TMP42]], i32 [[TMP18]], i32 [[TMP31]]
287 ; UNROLL-NO-VF-NEXT: [[PREDPHI36:%.*]] = select i1 [[TMP43]], i32 [[TMP19]], i32 [[TMP39]]
288 ; UNROLL-NO-VF-NEXT: [[PREDPHI37:%.*]] = select i1 [[TMP42]], i32 [[TMP20]], i32 [[TMP32]]
289 ; UNROLL-NO-VF-NEXT: [[PREDPHI38:%.*]] = select i1 [[TMP43]], i32 [[TMP21]], i32 [[TMP40]]
290 ; UNROLL-NO-VF-NEXT: [[PREDPHI39:%.*]] = select i1 [[TMP42]], i32 [[TMP22]], i32 [[TMP33]]
291 ; UNROLL-NO-VF-NEXT: [[PREDPHI40:%.*]] = select i1 [[TMP43]], i32 [[TMP23]], i32 [[TMP41]]
292 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI]], i32* [[TMP0]], align 4, !alias.scope !5, !noalias !8
293 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI34]], i32* [[TMP1]], align 4, !alias.scope !5, !noalias …
294 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI35]], i32* [[TMP2]], align 4, !alias.scope !12, !noalias…
295 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI36]], i32* [[TMP3]], align 4, !alias.scope !12, !noalias…
296 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI37]], i32* [[TMP4]], align 4, !alias.scope !14, !noalias…
297 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI38]], i32* [[TMP5]], align 4, !alias.scope !14, !noalias…
298 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI39]], i32* [[TMP6]], align 4, !alias.scope !15
299 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI40]], i32* [[TMP7]], align 4, !alias.scope !15
300 ; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
301 ; UNROLL-NO-VF-NEXT: [[TMP44:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128
302 ; UNROLL-NO-VF-NEXT: br i1 [[TMP44]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.l…
303 ; UNROLL-NO-VF: middle.block:
304 ; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128
305 ; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
306 ; UNROLL-NO-VF: scalar.ph:
307 ; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*…
308 ; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]]
309 ; UNROLL-NO-VF: for.cond.cleanup:
310 ; UNROLL-NO-VF-NEXT: ret void
311 ; UNROLL-NO-VF: for.body:
312 ; UNROLL-NO-VF-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDV…
313 ; UNROLL-NO-VF-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]]
314 ; UNROLL-NO-VF-NEXT: [[IUD:%.*]] = getelementptr inbounds i32, i32* [[AUD]], i64 [[INDVARS_IV]]
315 ; UNROLL-NO-VF-NEXT: [[ISR:%.*]] = getelementptr inbounds i32, i32* [[ASR]], i64 [[INDVARS_IV]]
316 ; UNROLL-NO-VF-NEXT: [[IUR:%.*]] = getelementptr inbounds i32, i32* [[AUR]], i64 [[INDVARS_IV]]
317 ; UNROLL-NO-VF-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4
318 ; UNROLL-NO-VF-NEXT: [[LUD:%.*]] = load i32, i32* [[IUD]], align 4
319 ; UNROLL-NO-VF-NEXT: [[LSR:%.*]] = load i32, i32* [[ISR]], align 4
320 ; UNROLL-NO-VF-NEXT: [[LUR:%.*]] = load i32, i32* [[IUR]], align 4
321 ; UNROLL-NO-VF-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23
322 ; UNROLL-NO-VF-NEXT: [[PUD:%.*]] = add nsw i32 [[LUD]], 24
323 ; UNROLL-NO-VF-NEXT: [[PSR:%.*]] = add nsw i32 [[LSR]], 25
324 ; UNROLL-NO-VF-NEXT: [[PUR:%.*]] = add nsw i32 [[LUR]], 26
325 ; UNROLL-NO-VF-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100
326 ; UNROLL-NO-VF-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_END]]
327 ; UNROLL-NO-VF: if.then:
328 ; UNROLL-NO-VF-NEXT: [[RSD:%.*]] = sdiv i32 [[PSD]], [[LSD]]
329 ; UNROLL-NO-VF-NEXT: [[RUD:%.*]] = udiv i32 [[PUD]], [[LUD]]
330 ; UNROLL-NO-VF-NEXT: [[RSR:%.*]] = srem i32 [[PSR]], [[LSR]]
331 ; UNROLL-NO-VF-NEXT: [[RUR:%.*]] = urem i32 [[PUR]], [[LUR]]
332 ; UNROLL-NO-VF-NEXT: br label [[IF_END]]
333 ; UNROLL-NO-VF: if.end:
334 ; UNROLL-NO-VF-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[FOR_BODY]] ]
335 ; UNROLL-NO-VF-NEXT: [[YUD_0:%.*]] = phi i32 [ [[RUD]], [[IF_THEN]] ], [ [[PUD]], [[FOR_BODY]] ]
336 ; UNROLL-NO-VF-NEXT: [[YSR_0:%.*]] = phi i32 [ [[RSR]], [[IF_THEN]] ], [ [[PSR]], [[FOR_BODY]] ]
337 ; UNROLL-NO-VF-NEXT: [[YUR_0:%.*]] = phi i32 [ [[RUR]], [[IF_THEN]] ], [ [[PUR]], [[FOR_BODY]] ]
338 ; UNROLL-NO-VF-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4
339 ; UNROLL-NO-VF-NEXT: store i32 [[YUD_0]], i32* [[IUD]], align 4
340 ; UNROLL-NO-VF-NEXT: store i32 [[YSR_0]], i32* [[ISR]], align 4
341 ; UNROLL-NO-VF-NEXT: store i32 [[YUR_0]], i32* [[IUR]], align 4
342 ; UNROLL-NO-VF-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
343 ; UNROLL-NO-VF-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128
344 ; UNROLL-NO-VF-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.l…
479 ; UNROLL-NO-VF-LABEL: @test_scalar2scalar(
480 ; UNROLL-NO-VF-NEXT: entry:
481 ; UNROLL-NO-VF-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8*
482 ; UNROLL-NO-VF-NEXT: [[BSD3:%.*]] = bitcast i32* [[BSD:%.*]] to i8*
483 ; UNROLL-NO-VF-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
484 ; UNROLL-NO-VF: vector.memcheck:
485 ; UNROLL-NO-VF-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128
486 ; UNROLL-NO-VF-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
487 ; UNROLL-NO-VF-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[BSD]], i64 128
488 ; UNROLL-NO-VF-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
489 ; UNROLL-NO-VF-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]]
490 ; UNROLL-NO-VF-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[BSD3]], [[SCEVGEP2]]
491 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
492 ; UNROLL-NO-VF-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
493 ; UNROLL-NO-VF: vector.ph:
494 ; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]]
495 ; UNROLL-NO-VF: vector.body:
496 ; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_…
497 ; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
498 ; UNROLL-NO-VF-NEXT: [[INDUCTION6:%.*]] = add i64 [[INDEX]], 1
499 ; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION]]
500 ; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION6]]
501 ; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !19, !noalias…
502 ; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !19, !noalias…
503 ; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP2]], 23
504 ; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = add nsw i32 [[TMP3]], 23
505 ; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP2]], 100
506 ; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP3]], 100
507 ; UNROLL-NO-VF-NEXT: br i1 [[TMP6]], label [[PRED_SDIV_IF:%.*]], label [[PRED_SDIV_CONTINUE:%.*]]
508 ; UNROLL-NO-VF: pred.sdiv.if:
509 ; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION]]
510 ; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4, !alias.scope !22
511 ; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = sdiv i32 [[TMP4]], [[TMP2]]
512 ; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = sdiv i32 [[TMP9]], [[TMP10]]
513 ; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE]]
514 ; UNROLL-NO-VF: pred.sdiv.continue:
515 ; UNROLL-NO-VF-NEXT: [[TMP12:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP10]], [[PRED_SD…
516 ; UNROLL-NO-VF-NEXT: [[TMP13:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP11]], [[PRED_SD…
517 ; UNROLL-NO-VF-NEXT: br i1 [[TMP7]], label [[PRED_SDIV_IF7:%.*]], label [[PRED_SDIV_CONTINUE8]]
518 ; UNROLL-NO-VF: pred.sdiv.if7:
519 ; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION6]]
520 ; UNROLL-NO-VF-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4, !alias.scope !22
521 ; UNROLL-NO-VF-NEXT: [[TMP16:%.*]] = sdiv i32 [[TMP5]], [[TMP3]]
522 ; UNROLL-NO-VF-NEXT: [[TMP17:%.*]] = sdiv i32 [[TMP15]], [[TMP16]]
523 ; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE8]]
524 ; UNROLL-NO-VF: pred.sdiv.continue8:
525 ; UNROLL-NO-VF-NEXT: [[TMP18:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP16]], [[…
526 ; UNROLL-NO-VF-NEXT: [[TMP19:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP17]], [[…
527 ; UNROLL-NO-VF-NEXT: [[TMP20:%.*]] = xor i1 [[TMP6]], true
528 ; UNROLL-NO-VF-NEXT: [[TMP21:%.*]] = xor i1 [[TMP7]], true
529 ; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP20]], i32 [[TMP4]], i32 [[TMP13]]
530 ; UNROLL-NO-VF-NEXT: [[PREDPHI9:%.*]] = select i1 [[TMP21]], i32 [[TMP5]], i32 [[TMP19]]
531 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI]], i32* [[TMP0]], align 4, !alias.scope !19, !noalias !…
532 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI9]], i32* [[TMP1]], align 4, !alias.scope !19, !noalias …
533 ; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
534 ; UNROLL-NO-VF-NEXT: [[TMP22:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128
535 ; UNROLL-NO-VF-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.l…
536 ; UNROLL-NO-VF: middle.block:
537 ; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128
538 ; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
539 ; UNROLL-NO-VF: scalar.ph:
540 ; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*…
541 ; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]]
542 ; UNROLL-NO-VF: for.cond.cleanup:
543 ; UNROLL-NO-VF-NEXT: ret void
544 ; UNROLL-NO-VF: for.body:
545 ; UNROLL-NO-VF-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDV…
546 ; UNROLL-NO-VF-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]]
547 ; UNROLL-NO-VF-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4
548 ; UNROLL-NO-VF-NEXT: [[ISD_B:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDVARS_IV]]
549 ; UNROLL-NO-VF-NEXT: [[LSD_B:%.*]] = load i32, i32* [[ISD_B]], align 4
550 ; UNROLL-NO-VF-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23
551 ; UNROLL-NO-VF-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100
552 ; UNROLL-NO-VF-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_END]]
553 ; UNROLL-NO-VF: if.then:
554 ; UNROLL-NO-VF-NEXT: [[SD1:%.*]] = sdiv i32 [[PSD]], [[LSD]]
555 ; UNROLL-NO-VF-NEXT: [[RSD:%.*]] = sdiv i32 [[LSD_B]], [[SD1]]
556 ; UNROLL-NO-VF-NEXT: br label [[IF_END]]
557 ; UNROLL-NO-VF: if.end:
558 ; UNROLL-NO-VF-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[FOR_BODY]] ]
559 ; UNROLL-NO-VF-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4
560 ; UNROLL-NO-VF-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
561 ; UNROLL-NO-VF-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128
562 ; UNROLL-NO-VF-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.l…
689 ; UNROLL-NO-VF-LABEL: @pr30172(
690 ; UNROLL-NO-VF-NEXT: entry:
691 ; UNROLL-NO-VF-NEXT: [[ASD1:%.*]] = bitcast i32* [[ASD:%.*]] to i8*
692 ; UNROLL-NO-VF-NEXT: [[BSD3:%.*]] = bitcast i32* [[BSD:%.*]] to i8*
693 ; UNROLL-NO-VF-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
694 ; UNROLL-NO-VF: vector.memcheck:
695 ; UNROLL-NO-VF-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[ASD]], i64 128
696 ; UNROLL-NO-VF-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
697 ; UNROLL-NO-VF-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[BSD]], i64 128
698 ; UNROLL-NO-VF-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
699 ; UNROLL-NO-VF-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[ASD1]], [[SCEVGEP45]]
700 ; UNROLL-NO-VF-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[BSD3]], [[SCEVGEP2]]
701 ; UNROLL-NO-VF-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
702 ; UNROLL-NO-VF-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
703 ; UNROLL-NO-VF: vector.ph:
704 ; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]]
705 ; UNROLL-NO-VF: vector.body:
706 ; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_…
707 ; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
708 ; UNROLL-NO-VF-NEXT: [[INDUCTION6:%.*]] = add i64 [[INDEX]], 1
709 ; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION]]
710 ; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDUCTION6]]
711 ; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !28, !noalias…
712 ; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4, !alias.scope !28, !noalias…
713 ; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP2]], 23
714 ; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = add nsw i32 [[TMP3]], 23
715 ; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP2]], 100
716 ; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP3]], 100
717 ; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = icmp sge i32 [[TMP2]], 200
718 ; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = icmp sge i32 [[TMP3]], 200
719 ; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = xor i1 [[TMP6]], true, !dbg [[DBG33:![0-9]+]]
720 ; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = xor i1 [[TMP7]], true, !dbg [[DBG33]]
721 ; UNROLL-NO-VF-NEXT: [[TMP12:%.*]] = select i1 [[TMP10]], i1 [[TMP8]], i1 false, !dbg [[DBG34:![…
722 ; UNROLL-NO-VF-NEXT: [[TMP13:%.*]] = select i1 [[TMP11]], i1 [[TMP9]], i1 false, !dbg [[DBG34]]
723 ; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = or i1 [[TMP12]], [[TMP6]]
724 ; UNROLL-NO-VF-NEXT: [[TMP15:%.*]] = or i1 [[TMP13]], [[TMP7]]
725 ; UNROLL-NO-VF-NEXT: br i1 [[TMP14]], label [[PRED_SDIV_IF:%.*]], label [[PRED_SDIV_CONTINUE:%.*…
726 ; UNROLL-NO-VF: pred.sdiv.if:
727 ; UNROLL-NO-VF-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION]]
728 ; UNROLL-NO-VF-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 4, !alias.scope !31
729 ; UNROLL-NO-VF-NEXT: [[TMP18:%.*]] = sdiv i32 [[TMP4]], [[TMP2]]
730 ; UNROLL-NO-VF-NEXT: [[TMP19:%.*]] = sdiv i32 [[TMP17]], [[TMP18]]
731 ; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE]]
732 ; UNROLL-NO-VF: pred.sdiv.continue:
733 ; UNROLL-NO-VF-NEXT: [[TMP20:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP18]], [[PRED_SD…
734 ; UNROLL-NO-VF-NEXT: [[TMP21:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP19]], [[PRED_SD…
735 ; UNROLL-NO-VF-NEXT: br i1 [[TMP15]], label [[PRED_SDIV_IF7:%.*]], label [[PRED_SDIV_CONTINUE8]]
736 ; UNROLL-NO-VF: pred.sdiv.if7:
737 ; UNROLL-NO-VF-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDUCTION6]]
738 ; UNROLL-NO-VF-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4, !alias.scope !31
739 ; UNROLL-NO-VF-NEXT: [[TMP24:%.*]] = sdiv i32 [[TMP5]], [[TMP3]]
740 ; UNROLL-NO-VF-NEXT: [[TMP25:%.*]] = sdiv i32 [[TMP23]], [[TMP24]]
741 ; UNROLL-NO-VF-NEXT: br label [[PRED_SDIV_CONTINUE8]]
742 ; UNROLL-NO-VF: pred.sdiv.continue8:
743 ; UNROLL-NO-VF-NEXT: [[TMP26:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP24]], [[…
744 ; UNROLL-NO-VF-NEXT: [[TMP27:%.*]] = phi i32 [ poison, [[PRED_SDIV_CONTINUE]] ], [ [[TMP25]], [[…
745 ; UNROLL-NO-VF-NEXT: [[TMP28:%.*]] = xor i1 [[TMP8]], true, !dbg [[DBG34]]
746 ; UNROLL-NO-VF-NEXT: [[TMP29:%.*]] = xor i1 [[TMP9]], true, !dbg [[DBG34]]
747 ; UNROLL-NO-VF-NEXT: [[TMP30:%.*]] = select i1 [[TMP10]], i1 [[TMP28]], i1 false, !dbg [[DBG34]]
748 ; UNROLL-NO-VF-NEXT: [[TMP31:%.*]] = select i1 [[TMP11]], i1 [[TMP29]], i1 false, !dbg [[DBG34]]
749 ; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP30]], i32 [[TMP4]], i32 [[TMP21]]
750 ; UNROLL-NO-VF-NEXT: [[PREDPHI9:%.*]] = select i1 [[TMP31]], i32 [[TMP5]], i32 [[TMP27]]
751 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI]], i32* [[TMP0]], align 4, !alias.scope !28, !noalias !…
752 ; UNROLL-NO-VF-NEXT: store i32 [[PREDPHI9]], i32* [[TMP1]], align 4, !alias.scope !28, !noalias …
753 ; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
754 ; UNROLL-NO-VF-NEXT: [[TMP32:%.*]] = icmp eq i64 [[INDEX_NEXT]], 128
755 ; UNROLL-NO-VF-NEXT: br i1 [[TMP32]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.l…
756 ; UNROLL-NO-VF: middle.block:
757 ; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 128, 128
758 ; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
759 ; UNROLL-NO-VF: scalar.ph:
760 ; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 128, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*…
761 ; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]]
762 ; UNROLL-NO-VF: for.cond.cleanup:
763 ; UNROLL-NO-VF-NEXT: ret void
764 ; UNROLL-NO-VF: for.body:
765 ; UNROLL-NO-VF-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDV…
766 ; UNROLL-NO-VF-NEXT: [[ISD:%.*]] = getelementptr inbounds i32, i32* [[ASD]], i64 [[INDVARS_IV]]
767 ; UNROLL-NO-VF-NEXT: [[LSD:%.*]] = load i32, i32* [[ISD]], align 4
768 ; UNROLL-NO-VF-NEXT: [[ISD_B:%.*]] = getelementptr inbounds i32, i32* [[BSD]], i64 [[INDVARS_IV]]
769 ; UNROLL-NO-VF-NEXT: [[LSD_B:%.*]] = load i32, i32* [[ISD_B]], align 4
770 ; UNROLL-NO-VF-NEXT: [[PSD:%.*]] = add nsw i32 [[LSD]], 23
771 ; UNROLL-NO-VF-NEXT: [[CMP1:%.*]] = icmp slt i32 [[LSD]], 100
772 ; UNROLL-NO-VF-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[CHECKBB:%.*]], !dbg [[DBG33]]
773 ; UNROLL-NO-VF: checkbb:
774 ; UNROLL-NO-VF-NEXT: [[CMP2:%.*]] = icmp sge i32 [[LSD]], 200
775 ; UNROLL-NO-VF-NEXT: br i1 [[CMP2]], label [[IF_THEN]], label [[IF_END]], !dbg [[DBG34]]
776 ; UNROLL-NO-VF: if.then:
777 ; UNROLL-NO-VF-NEXT: [[SD1:%.*]] = sdiv i32 [[PSD]], [[LSD]]
778 ; UNROLL-NO-VF-NEXT: [[RSD:%.*]] = sdiv i32 [[LSD_B]], [[SD1]]
779 ; UNROLL-NO-VF-NEXT: br label [[IF_END]]
780 ; UNROLL-NO-VF: if.end:
781 ; UNROLL-NO-VF-NEXT: [[YSD_0:%.*]] = phi i32 [ [[RSD]], [[IF_THEN]] ], [ [[PSD]], [[CHECKBB]] ]
782 ; UNROLL-NO-VF-NEXT: store i32 [[YSD_0]], i32* [[ISD]], align 4
783 ; UNROLL-NO-VF-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
784 ; UNROLL-NO-VF-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 128
785 ; UNROLL-NO-VF-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.l…
896 ; UNROLL-NO-VF-LABEL: @predicated_udiv_scalarized_operand(
897 ; UNROLL-NO-VF-NEXT: entry:
898 ; UNROLL-NO-VF-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[N:%.*]], i64 1)
899 ; UNROLL-NO-VF-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 2
900 ; UNROLL-NO-VF-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
901 ; UNROLL-NO-VF: vector.ph:
902 ; UNROLL-NO-VF-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[SMAX]], 2
903 ; UNROLL-NO-VF-NEXT: [[N_VEC:%.*]] = sub i64 [[SMAX]], [[N_MOD_VF]]
904 ; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]]
905 ; UNROLL-NO-VF: vector.body:
906 ; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_…
907 ; UNROLL-NO-VF-NEXT: [[VEC_PHI:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP12:%.*]], [[PRED_UDI…
908 ; UNROLL-NO-VF-NEXT: [[VEC_PHI1:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[TMP13:%.*]], [[PRED_UD…
909 ; UNROLL-NO-VF-NEXT: [[INDUCTION:%.*]] = add i64 [[INDEX]], 0
910 ; UNROLL-NO-VF-NEXT: [[INDUCTION2:%.*]] = add i64 [[INDEX]], 1
911 ; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDUCTION]]
912 ; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDUCTION2]]
913 ; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4
914 ; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]], align 4
915 ; UNROLL-NO-VF-NEXT: br i1 [[C:%.*]], label [[PRED_UDIV_IF:%.*]], label [[PRED_UDIV_CONTINUE:%.*…
916 ; UNROLL-NO-VF: pred.udiv.if:
917 ; UNROLL-NO-VF-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP2]], [[X:%.*]]
918 ; UNROLL-NO-VF-NEXT: [[TMP5:%.*]] = udiv i32 [[TMP2]], [[TMP4]]
919 ; UNROLL-NO-VF-NEXT: br label [[PRED_UDIV_CONTINUE]]
920 ; UNROLL-NO-VF: pred.udiv.continue:
921 ; UNROLL-NO-VF-NEXT: [[TMP6:%.*]] = phi i32 [ poison, [[VECTOR_BODY]] ], [ [[TMP5]], [[PRED_UDIV…
922 ; UNROLL-NO-VF-NEXT: br i1 [[C]], label [[PRED_UDIV_IF3:%.*]], label [[PRED_UDIV_CONTINUE4]]
923 ; UNROLL-NO-VF: pred.udiv.if3:
924 ; UNROLL-NO-VF-NEXT: [[TMP7:%.*]] = add nsw i32 [[TMP3]], [[X]]
925 ; UNROLL-NO-VF-NEXT: [[TMP8:%.*]] = udiv i32 [[TMP3]], [[TMP7]]
926 ; UNROLL-NO-VF-NEXT: br label [[PRED_UDIV_CONTINUE4]]
927 ; UNROLL-NO-VF: pred.udiv.continue4:
928 ; UNROLL-NO-VF-NEXT: [[TMP9:%.*]] = phi i32 [ poison, [[PRED_UDIV_CONTINUE]] ], [ [[TMP8]], [[PR…
929 ; UNROLL-NO-VF-NEXT: [[TMP10:%.*]] = xor i1 [[C]], true
930 ; UNROLL-NO-VF-NEXT: [[TMP11:%.*]] = xor i1 [[C]], true
931 ; UNROLL-NO-VF-NEXT: [[PREDPHI:%.*]] = select i1 [[C]], i32 [[TMP6]], i32 [[TMP2]]
932 ; UNROLL-NO-VF-NEXT: [[PREDPHI5:%.*]] = select i1 [[C]], i32 [[TMP9]], i32 [[TMP3]]
933 ; UNROLL-NO-VF-NEXT: [[TMP12]] = add i32 [[VEC_PHI]], [[PREDPHI]]
934 ; UNROLL-NO-VF-NEXT: [[TMP13]] = add i32 [[VEC_PHI1]], [[PREDPHI5]]
935 ; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
936 ; UNROLL-NO-VF-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
937 ; UNROLL-NO-VF-NEXT: br i1 [[TMP14]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.l…
938 ; UNROLL-NO-VF: middle.block:
939 ; UNROLL-NO-VF-NEXT: [[BIN_RDX:%.*]] = add i32 [[TMP13]], [[TMP12]]
940 ; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[SMAX]], [[N_VEC]]
941 ; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
942 ; UNROLL-NO-VF: scalar.ph:
943 ; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENT…
944 ; UNROLL-NO-VF-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[BIN_RDX]], [[MIDDLE_BL…
945 ; UNROLL-NO-VF-NEXT: br label [[FOR_BODY:%.*]]
946 ; UNROLL-NO-VF: for.body:
947 ; UNROLL-NO-VF-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]],…
948 ; UNROLL-NO-VF-NEXT: [[R:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[T6:%.*]], [[FO…
949 ; UNROLL-NO-VF-NEXT: [[T0:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I]]
950 ; UNROLL-NO-VF-NEXT: [[T2:%.*]] = load i32, i32* [[T0]], align 4
951 ; UNROLL-NO-VF-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[FOR_INC]]
952 ; UNROLL-NO-VF: if.then:
953 ; UNROLL-NO-VF-NEXT: [[T3:%.*]] = add nsw i32 [[T2]], [[X]]
954 ; UNROLL-NO-VF-NEXT: [[T4:%.*]] = udiv i32 [[T2]], [[T3]]
955 ; UNROLL-NO-VF-NEXT: br label [[FOR_INC]]
956 ; UNROLL-NO-VF: for.inc:
957 ; UNROLL-NO-VF-NEXT: [[T5:%.*]] = phi i32 [ [[T2]], [[FOR_BODY]] ], [ [[T4]], [[IF_THEN]] ]
958 ; UNROLL-NO-VF-NEXT: [[T6]] = add i32 [[R]], [[T5]]
959 ; UNROLL-NO-VF-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
960 ; UNROLL-NO-VF-NEXT: [[COND:%.*]] = icmp slt i64 [[I_NEXT]], [[N]]
961 ; UNROLL-NO-VF-NEXT: br i1 [[COND]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP38:…
962 ; UNROLL-NO-VF: for.end:
963 ; UNROLL-NO-VF-NEXT: [[T7:%.*]] = phi i32 [ [[T6]], [[FOR_INC]] ], [ [[BIN_RDX]], [[MIDDLE_BLOCK…
964 ; UNROLL-NO-VF-NEXT: ret i32 [[T7]]