Lines Matching refs:ALL
2 …ux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL
119 ; ALL-LABEL: name: test_i8
120 ; ALL: bb.0.entry:
121 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
122 ; ALL-NEXT: liveins: $edi, $edx, $esi
123 ; ALL-NEXT: {{ $}}
124 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
125 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
126 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit
127 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr32 = COPY $edx
128 ; ALL-NEXT: [[COPY4:%[0-9]+]]:gr8 = COPY [[COPY3]].sub_8bit
129 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
130 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
131 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
132 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
133 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
134 ; ALL-NEXT: {{ $}}
135 ; ALL-NEXT: bb.1.cond.false:
136 ; ALL-NEXT: successors: %bb.2(0x80000000)
137 ; ALL-NEXT: {{ $}}
138 ; ALL-NEXT: {{ $}}
139 ; ALL-NEXT: bb.2.cond.end:
140 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr8 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
141 ; ALL-NEXT: $al = COPY [[PHI]]
142 ; ALL-NEXT: RET 0, implicit $al
183 ; ALL-LABEL: name: test_i16
184 ; ALL: bb.0.entry:
185 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
186 ; ALL-NEXT: liveins: $edi, $edx, $esi
187 ; ALL-NEXT: {{ $}}
188 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
189 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
190 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY1]].sub_16bit
191 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr32 = COPY $edx
192 ; ALL-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY [[COPY3]].sub_16bit
193 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
194 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
195 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
196 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
197 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
198 ; ALL-NEXT: {{ $}}
199 ; ALL-NEXT: bb.1.cond.false:
200 ; ALL-NEXT: successors: %bb.2(0x80000000)
201 ; ALL-NEXT: {{ $}}
202 ; ALL-NEXT: {{ $}}
203 ; ALL-NEXT: bb.2.cond.end:
204 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr16 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
205 ; ALL-NEXT: $ax = COPY [[PHI]]
206 ; ALL-NEXT: RET 0, implicit $ax
246 ; ALL-LABEL: name: test_i32
247 ; ALL: bb.0.entry:
248 ; ALL-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
249 ; ALL-NEXT: liveins: $edi, $edx, $esi
250 ; ALL-NEXT: {{ $}}
251 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
252 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi
253 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $edx
254 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
255 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
256 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
257 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
258 ; ALL-NEXT: JCC_1 %bb.1, 5, implicit $eflags
259 ; ALL-NEXT: JMP_1 %bb.2
260 ; ALL-NEXT: {{ $}}
261 ; ALL-NEXT: bb.1.cond.true:
262 ; ALL-NEXT: successors: %bb.3(0x80000000)
263 ; ALL-NEXT: {{ $}}
264 ; ALL-NEXT: JMP_1 %bb.3
265 ; ALL-NEXT: {{ $}}
266 ; ALL-NEXT: bb.2.cond.false:
267 ; ALL-NEXT: successors: %bb.3(0x80000000)
268 ; ALL-NEXT: {{ $}}
269 ; ALL-NEXT: {{ $}}
270 ; ALL-NEXT: bb.3.cond.end:
271 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2
272 ; ALL-NEXT: $eax = COPY [[PHI]]
273 ; ALL-NEXT: RET 0, implicit $eax
317 ; ALL-LABEL: name: test_i64
318 ; ALL: bb.0.entry:
319 ; ALL-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
320 ; ALL-NEXT: liveins: $edi, $rdx, $rsi
321 ; ALL-NEXT: {{ $}}
322 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
323 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi
324 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rdx
325 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
326 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
327 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
328 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
329 ; ALL-NEXT: JCC_1 %bb.1, 5, implicit $eflags
330 ; ALL-NEXT: JMP_1 %bb.2
331 ; ALL-NEXT: {{ $}}
332 ; ALL-NEXT: bb.1.cond.true:
333 ; ALL-NEXT: successors: %bb.3(0x80000000)
334 ; ALL-NEXT: {{ $}}
335 ; ALL-NEXT: JMP_1 %bb.3
336 ; ALL-NEXT: {{ $}}
337 ; ALL-NEXT: bb.2.cond.false:
338 ; ALL-NEXT: successors: %bb.3(0x80000000)
339 ; ALL-NEXT: {{ $}}
340 ; ALL-NEXT: {{ $}}
341 ; ALL-NEXT: bb.3.cond.end:
342 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2
343 ; ALL-NEXT: $rax = COPY [[PHI]]
344 ; ALL-NEXT: RET 0, implicit $rax
394 ; ALL-LABEL: name: test_float
395 ; ALL: bb.0.entry:
396 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
397 ; ALL-NEXT: liveins: $edi, $xmm0, $xmm1
398 ; ALL-NEXT: {{ $}}
399 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
400 ; ALL-NEXT: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0
401 ; ALL-NEXT: [[COPY2:%[0-9]+]]:fr32 = COPY [[COPY1]]
402 ; ALL-NEXT: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1
403 ; ALL-NEXT: [[COPY4:%[0-9]+]]:fr32 = COPY [[COPY3]]
404 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
405 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
406 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
407 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
408 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
409 ; ALL-NEXT: {{ $}}
410 ; ALL-NEXT: bb.1.cond.false:
411 ; ALL-NEXT: successors: %bb.2(0x80000000)
412 ; ALL-NEXT: {{ $}}
413 ; ALL-NEXT: {{ $}}
414 ; ALL-NEXT: bb.2.cond.end:
415 ; ALL-NEXT: [[PHI:%[0-9]+]]:fr32 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
416 ; ALL-NEXT: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]]
417 ; ALL-NEXT: $xmm0 = COPY [[COPY5]]
418 ; ALL-NEXT: RET 0, implicit $xmm0
460 ; ALL-LABEL: name: test_double
461 ; ALL: bb.0.entry:
462 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
463 ; ALL-NEXT: liveins: $edi, $xmm0, $xmm1
464 ; ALL-NEXT: {{ $}}
465 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
466 ; ALL-NEXT: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0
467 ; ALL-NEXT: [[COPY2:%[0-9]+]]:fr64 = COPY [[COPY1]]
468 ; ALL-NEXT: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1
469 ; ALL-NEXT: [[COPY4:%[0-9]+]]:fr64 = COPY [[COPY3]]
470 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
471 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags
472 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags
473 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags
474 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags
475 ; ALL-NEXT: {{ $}}
476 ; ALL-NEXT: bb.1.cond.false:
477 ; ALL-NEXT: successors: %bb.2(0x80000000)
478 ; ALL-NEXT: {{ $}}
479 ; ALL-NEXT: {{ $}}
480 ; ALL-NEXT: bb.2.cond.end:
481 ; ALL-NEXT: [[PHI:%[0-9]+]]:fr64 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0
482 ; ALL-NEXT: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]]
483 ; ALL-NEXT: $xmm0 = COPY [[COPY5]]
484 ; ALL-NEXT: RET 0, implicit $xmm0