393   MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {  in getScalarShiftAmountTy()  argument
419   getNumRegisters(LLVMContext &Context, EVT VT,  in getNumRegisters()
428   bool hasBitPreservingFPLogic(EVT VT) const override {  in hasBitPreservingFPLogic()
429     EVT ScVT = VT.getScalarType();  in hasBitPreservingFPLogic()
436   bool convertSetCCLogicToBitwiseLogic(EVT VT) const override {  in convertSetCCLogicToBitwiseLogic()
439   EVT getSetCCResultType(const DataLayout &DL, LLVMContext &,
440                          EVT) const override;
442                                   EVT VT) const override;
443   bool isFPImmLegal(const APFloat &Imm, EVT VT,
445   bool ShouldShrinkFPConstant(EVT VT) const override {  in ShouldShrinkFPConstant()
456   bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, Align Alignment,
460   findOptimalMemOpLowering(std::vector<EVT> &MemOps, unsigned Limit,
463   EVT getOptimalMemOpType(const MemOp &Op,
466   bool isTruncateFree(EVT, EVT) const override;  in isTruncateFree()  argument
468   bool shouldFormOverflowOp(unsigned Opcode, EVT VT,
566                              MVT PartVT, EVT ValueVT,
578                    EVT RetVT, ArrayRef<SDValue> Ops, CallingConv::ID CallConv,
624                        const SDLoc &DL, EVT VT,
627                            EVT VT, ISD::CondCode CC,
680   SDValue buildVector(SelectionDAG &DAG, const SDLoc &DL, EVT VT,
692   bool canTreatAsByteVector(EVT VT) const;
693   SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
696   SDValue combineTruncateExtract(const SDLoc &DL, EVT TruncVT, SDValue Op,
702   bool canLoadStoreByteSwapped(EVT VT) const;