121     unsigned MemKind : 4;  member
188   createMem(MemoryKind MemKind, RegisterKind RegKind, unsigned Base,  in createMem()  argument
192     Op->Mem.MemKind = MemKind;  in createMem()
197     if (MemKind == BDLMem)  in createMem()
199     if (MemKind == BDRMem)  in createMem()
260   bool isMem(MemoryKind MemKind) const {  in isMem()
262             (Mem.MemKind == MemKind ||  in isMem()
265              (Mem.MemKind == BDMem && MemKind == BDXMem)));  in isMem()
267   bool isMem(MemoryKind MemKind, RegisterKind RegKind) const {  in isMem()  argument
268     return isMem(MemKind) && Mem.RegKind == RegKind;  in isMem()
270   bool isMemDisp12(MemoryKind MemKind, RegisterKind RegKind) const {  in isMemDisp12()  argument
271     return isMem(MemKind, RegKind) && inRange(Mem.Disp, 0, 0xfff, true);  in isMemDisp12()
273   bool isMemDisp20(MemoryKind MemKind, RegisterKind RegKind) const {  in isMemDisp20()  argument
274     return isMem(MemKind, RegKind) && inRange(Mem.Disp, -524288, 524287, true);  in isMemDisp20()
437                                     MemoryKind MemKind,
743       if (Op.MemKind == BDLMem)  in print()
745       else if (Op.MemKind == BDRMem)  in print()
1109 SystemZAsmParser::parseAddress(OperandVector &Operands, MemoryKind MemKind,  in parseAddress()  argument
1118   bool HasLength = (MemKind == BDLMem) ? true : false;  in parseAddress()
1119   bool HasVectorIndex = (MemKind == BDVMem) ? true : false;  in parseAddress()
1131   switch (MemKind) {  in parseAddress()
1214   Operands.push_back(SystemZOperand::createMem(MemKind, RegKind, Base, Disp,  in parseAddress()