Lines Matching refs:RISCVDAGToDAGISel
45 void RISCVDAGToDAGISel::PreprocessISelDAG() { in PreprocessISelDAG()
137 void RISCVDAGToDAGISel::PostprocessISelDAG() { in PostprocessISelDAG()
249 void RISCVDAGToDAGISel::addVectorLoadStoreOperands( in addVectorLoadStoreOperands()
296 void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, bool IsMasked, in selectVLSEG()
339 void RISCVDAGToDAGISel::selectVLSEGFF(SDNode *Node, bool IsMasked) { in selectVLSEGFF()
384 void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, bool IsMasked, in selectVLXSEG()
438 void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, bool IsMasked, in selectVSSEG()
470 void RISCVDAGToDAGISel::selectVSXSEG(SDNode *Node, bool IsMasked, in selectVSXSEG()
512 void RISCVDAGToDAGISel::selectVSETVLI(SDNode *Node) { in selectVSETVLI()
582 void RISCVDAGToDAGISel::Select(SDNode *Node) { in Select()
1733 bool RISCVDAGToDAGISel::SelectInlineAsmMemoryOperand( in SelectInlineAsmMemoryOperand()
1751 bool RISCVDAGToDAGISel::SelectAddrFrameIndex(SDValue Addr, SDValue &Base, in SelectAddrFrameIndex()
1763 bool RISCVDAGToDAGISel::SelectFrameAddrRegImm(SDValue Addr, SDValue &Base, in SelectFrameAddrRegImm()
1856 bool RISCVDAGToDAGISel::SelectAddrRegImm(SDValue Addr, SDValue &Base, in SelectAddrRegImm()
1946 bool RISCVDAGToDAGISel::selectShiftMask(SDValue N, unsigned ShiftWidth, in selectShiftMask()
1992 bool RISCVDAGToDAGISel::selectSExti32(SDValue N, SDValue &Val) { in selectSExti32()
2007 bool RISCVDAGToDAGISel::selectZExti32(SDValue N, SDValue &Val) { in selectZExti32()
2028 bool RISCVDAGToDAGISel::selectSHXADDOp(SDValue N, unsigned ShAmt, in selectSHXADDOp()
2131 bool RISCVDAGToDAGISel::hasAllNBitUsers(SDNode *Node, unsigned Bits) const { in hasAllNBitUsers()
2231 bool RISCVDAGToDAGISel::selectVLOp(SDValue N, SDValue &VL) { in selectVLOp()
2255 bool RISCVDAGToDAGISel::selectVSplat(SDValue N, SDValue &SplatVal) { in selectVSplat()
2296 bool RISCVDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &SplatVal) { in selectVSplatSimm5()
2301 bool RISCVDAGToDAGISel::selectVSplatSimm5Plus1(SDValue N, SDValue &SplatVal) { in selectVSplatSimm5Plus1()
2307 bool RISCVDAGToDAGISel::selectVSplatSimm5Plus1NonZero(SDValue N, in selectVSplatSimm5Plus1NonZero()
2315 bool RISCVDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &SplatVal) { in selectVSplatUimm5()
2332 bool RISCVDAGToDAGISel::selectRVVSimm5(SDValue N, unsigned Width, in selectRVVSimm5()
2349 bool RISCVDAGToDAGISel::doPeepholeSExtW(SDNode *N) { in doPeepholeSExtW()
2414 bool RISCVDAGToDAGISel::doPeepholeMaskedRVV(SDNode *N) { in doPeepholeMaskedRVV()
2518 return new RISCVDAGToDAGISel(TM, OptLevel); in createRISCVISelDag()