Lines Matching refs:IDLoc
87 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
113 unsigned SecondOpcode, SMLoc IDLoc, MCStreamer &Out);
116 void emitLoadLocalAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
119 void emitLoadAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
123 void emitLoadTLSIEAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
127 void emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
130 void emitLoadStoreSymbol(MCInst &Inst, unsigned Opcode, SMLoc IDLoc,
135 SMLoc IDLoc, MCStreamer &Out);
138 void emitVMSGE(MCInst &Inst, unsigned Opcode, SMLoc IDLoc, MCStreamer &Out);
153 bool processInstruction(MCInst &Inst, SMLoc IDLoc, OperandVector &Operands,
1066 bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, in MatchAndEmitInstruction() argument
1082 return processInstruction(Inst, IDLoc, Operands, Out); in MatchAndEmitInstruction()
1094 return Error(IDLoc, Msg); in MatchAndEmitInstruction()
1100 return Error(IDLoc, "unrecognized instruction mnemonic" + Suggestion); in MatchAndEmitInstruction()
1103 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction()
1110 ErrorLoc = IDLoc; in MatchAndEmitInstruction()
1120 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction()
2342 unsigned SecondOpcode, SMLoc IDLoc, in emitAuipcInstPair() argument
2366 void RISCVAsmParser::emitLoadLocalAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadLocalAddress() argument
2377 RISCV::ADDI, IDLoc, Out); in emitLoadLocalAddress()
2380 void RISCVAsmParser::emitLoadAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadAddress() argument
2402 emitAuipcInstPair(DestReg, DestReg, Symbol, VKHi, SecondOpcode, IDLoc, Out); in emitLoadAddress()
2405 void RISCVAsmParser::emitLoadTLSIEAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadTLSIEAddress() argument
2417 SecondOpcode, IDLoc, Out); in emitLoadTLSIEAddress()
2420 void RISCVAsmParser::emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadTLSGDAddress() argument
2431 RISCV::ADDI, IDLoc, Out); in emitLoadTLSGDAddress()
2435 SMLoc IDLoc, MCStreamer &Out, in emitLoadStoreSymbol() argument
2450 Opcode, IDLoc, Out); in emitLoadStoreSymbol()
2454 int64_t Width, SMLoc IDLoc, in emitPseudoExtend() argument
2482 void RISCVAsmParser::emitVMSGE(MCInst &Inst, unsigned Opcode, SMLoc IDLoc, in emitVMSGE() argument
2638 bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc, in processInstruction() argument
2641 Inst.setLoc(IDLoc); in processInstruction()
2668 emitLoadLocalAddress(Inst, IDLoc, Out); in processInstruction()
2671 emitLoadAddress(Inst, IDLoc, Out); in processInstruction()
2674 emitLoadTLSIEAddress(Inst, IDLoc, Out); in processInstruction()
2677 emitLoadTLSGDAddress(Inst, IDLoc, Out); in processInstruction()
2680 emitLoadStoreSymbol(Inst, RISCV::LB, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2683 emitLoadStoreSymbol(Inst, RISCV::LBU, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2686 emitLoadStoreSymbol(Inst, RISCV::LH, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2689 emitLoadStoreSymbol(Inst, RISCV::LHU, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2692 emitLoadStoreSymbol(Inst, RISCV::LW, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2695 emitLoadStoreSymbol(Inst, RISCV::LWU, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2698 emitLoadStoreSymbol(Inst, RISCV::LD, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2701 emitLoadStoreSymbol(Inst, RISCV::FLH, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2704 emitLoadStoreSymbol(Inst, RISCV::FLW, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2707 emitLoadStoreSymbol(Inst, RISCV::FLD, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2710 emitLoadStoreSymbol(Inst, RISCV::SB, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2713 emitLoadStoreSymbol(Inst, RISCV::SH, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2716 emitLoadStoreSymbol(Inst, RISCV::SW, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2719 emitLoadStoreSymbol(Inst, RISCV::SD, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2722 emitLoadStoreSymbol(Inst, RISCV::FSH, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2725 emitLoadStoreSymbol(Inst, RISCV::FSW, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2728 emitLoadStoreSymbol(Inst, RISCV::FSD, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2735 emitPseudoExtend(Inst, /*SignExtend=*/true, /*Width=*/8, IDLoc, Out); in processInstruction()
2738 emitPseudoExtend(Inst, /*SignExtend=*/true, /*Width=*/16, IDLoc, Out); in processInstruction()
2741 emitPseudoExtend(Inst, /*SignExtend=*/false, /*Width=*/16, IDLoc, Out); in processInstruction()
2744 emitPseudoExtend(Inst, /*SignExtend=*/false, /*Width=*/32, IDLoc, Out); in processInstruction()
2749 emitVMSGE(Inst, RISCV::VMSLTU_VX, IDLoc, Out); in processInstruction()
2754 emitVMSGE(Inst, RISCV::VMSLT_VX, IDLoc, Out); in processInstruction()