Lines Matching refs:getKillRegState

736         .addReg(NegSizeReg, getKillRegState(KillNegSizeReg));  in lowerDynamicAlloc()
744         .addReg(NegSizeReg, getKillRegState(KillNegSizeReg));  in lowerDynamicAlloc()
824           .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg))  in prepareDynamicAlloca()
841           .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg))  in prepareDynamicAlloca()
941       .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));  in lowerCRSpilling()
1101               RegState::Implicit | getKillRegState(MI.getOperand(0).isKill()));  in lowerCRBitSpilling()
1217                         .addReg(Reg, getKillRegState(IsKilled)),  in spillRegPairs()
1221                         .addReg(Reg + 1, getKillRegState(IsKilled)),  in spillRegPairs()
1226                           .addReg(Reg + 2, getKillRegState(IsKilled)),  in spillRegPairs()
1230                           .addReg(Reg + 3, getKillRegState(IsKilled)),  in spillRegPairs()
1291                           .addReg(Reg, getKillRegState(IsKilled)),  in lowerACCSpilling()
1294                           .addReg(Reg + 1, getKillRegState(IsKilled)),  in lowerACCSpilling()
1355                         .addReg(Reg, getKillRegState(IsKilled)),  in lowerQuadwordSpilling()
1358                         .addReg(Reg + 1, getKillRegState(IsKilled)),  in lowerQuadwordSpilling()