Lines Matching refs:NegSizeReg
727 Register NegSizeReg = MI.getOperand(1).getReg(); in lowerDynamicAlloc() local
729 prepareDynamicAlloca(II, NegSizeReg, KillNegSizeReg, Reg); in lowerDynamicAlloc()
736 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
744 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
758 Register &NegSizeReg, in prepareDynamicAlloca() argument
813 unsigned UnalNegSizeReg = NegSizeReg; in prepareDynamicAlloca()
814 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
818 BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg) in prepareDynamicAlloca()
821 unsigned NegSizeReg1 = NegSizeReg; in prepareDynamicAlloca()
822 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
823 BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg) in prepareDynamicAlloca()
830 unsigned UnalNegSizeReg = NegSizeReg; in prepareDynamicAlloca()
831 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
835 BuildMI(MBB, II, dl, TII.get(PPC::LI), NegSizeReg) in prepareDynamicAlloca()
838 unsigned NegSizeReg1 = NegSizeReg; in prepareDynamicAlloca()
839 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
840 BuildMI(MBB, II, dl, TII.get(PPC::AND), NegSizeReg) in prepareDynamicAlloca()
864 Register NegSizeReg = MI.getOperand(2).getReg(); in lowerPrepareProbedAlloca() local
867 if (FramePointer == NegSizeReg) { in lowerPrepareProbedAlloca()
874 .addReg(NegSizeReg) in lowerPrepareProbedAlloca()
875 .addReg(NegSizeReg); in lowerPrepareProbedAlloca()
876 NegSizeReg = ActualNegSizeReg; in lowerPrepareProbedAlloca()
879 prepareDynamicAlloca(II, NegSizeReg, KillNegSizeReg, FramePointer); in lowerPrepareProbedAlloca()
882 if (NegSizeReg != ActualNegSizeReg) in lowerPrepareProbedAlloca()
884 .addReg(NegSizeReg) in lowerPrepareProbedAlloca()
885 .addReg(NegSizeReg); in lowerPrepareProbedAlloca()