Lines Matching refs:PPC
138 assert((MF.getRegInfo().use_empty(PPC::X2) || in runOnMachineFunction()
178 if (Opcode == PPC::RLDICL || Opcode == PPC::RLDICL_rec || in getKnownLeadingZeroCount()
179 Opcode == PPC::RLDCL || Opcode == PPC::RLDCL_rec) in getKnownLeadingZeroCount()
182 if ((Opcode == PPC::RLDIC || Opcode == PPC::RLDIC_rec) && in getKnownLeadingZeroCount()
186 if ((Opcode == PPC::RLWINM || Opcode == PPC::RLWINM_rec || in getKnownLeadingZeroCount()
187 Opcode == PPC::RLWNM || Opcode == PPC::RLWNM_rec || in getKnownLeadingZeroCount()
188 Opcode == PPC::RLWINM8 || Opcode == PPC::RLWNM8) && in getKnownLeadingZeroCount()
192 if (Opcode == PPC::ANDI_rec) { in getKnownLeadingZeroCount()
197 if (Opcode == PPC::CNTLZW || Opcode == PPC::CNTLZW_rec || in getKnownLeadingZeroCount()
198 Opcode == PPC::CNTTZW || Opcode == PPC::CNTTZW_rec || in getKnownLeadingZeroCount()
199 Opcode == PPC::CNTLZW8 || Opcode == PPC::CNTTZW8) in getKnownLeadingZeroCount()
203 if (Opcode == PPC::CNTLZD || Opcode == PPC::CNTLZD_rec || in getKnownLeadingZeroCount()
204 Opcode == PPC::CNTTZD || Opcode == PPC::CNTTZD_rec) in getKnownLeadingZeroCount()
208 if (Opcode == PPC::LHZ || Opcode == PPC::LHZX || in getKnownLeadingZeroCount()
209 Opcode == PPC::LHZ8 || Opcode == PPC::LHZX8 || in getKnownLeadingZeroCount()
210 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || in getKnownLeadingZeroCount()
211 Opcode == PPC::LHZU8 || Opcode == PPC::LHZUX8) in getKnownLeadingZeroCount()
214 if (Opcode == PPC::LBZ || Opcode == PPC::LBZX || in getKnownLeadingZeroCount()
215 Opcode == PPC::LBZ8 || Opcode == PPC::LBZX8 || in getKnownLeadingZeroCount()
216 Opcode == PPC::LBZU || Opcode == PPC::LBZUX || in getKnownLeadingZeroCount()
217 Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8) in getKnownLeadingZeroCount()
300 if (Opcode == PPC::COPY) { in collectUnprimedAccPHIs()
303 MRI->getRegClass(Reg) != &PPC::ACCRCRegClass) in collectUnprimedAccPHIs()
305 } else if (Opcode != PPC::IMPLICIT_DEF && Opcode != PPC::PHI) in collectUnprimedAccPHIs()
311 if (Opcode != PPC::PHI) in collectUnprimedAccPHIs()
342 assert((Opcode == PPC::COPY || Opcode == PPC::IMPLICIT_DEF || in convertUnprimedAccPHIs()
343 Opcode == PPC::PHI) && in convertUnprimedAccPHIs()
345 if (Opcode == PPC::COPY) { in convertUnprimedAccPHIs()
347 &PPC::ACCRCRegClass && in convertUnprimedAccPHIs()
350 } else if (Opcode == PPC::IMPLICIT_DEF) { in convertUnprimedAccPHIs()
351 Register AccReg = MRI->createVirtualRegister(&PPC::ACCRCRegClass); in convertUnprimedAccPHIs()
353 TII->get(PPC::IMPLICIT_DEF), AccReg); in convertUnprimedAccPHIs()
356 } else if (Opcode == PPC::PHI) { in convertUnprimedAccPHIs()
375 AccReg = MRI->createVirtualRegister(&PPC::ACCRCRegClass); in convertUnprimedAccPHIs()
377 *PHI->getParent(), PHI, PHI->getDebugLoc(), TII->get(PPC::PHI), AccReg); in convertUnprimedAccPHIs()
446 case PPC::COPY: { in simplifyCode()
452 if (MRI->getRegClass(Src) != &PPC::UACCRCRegClass || in simplifyCode()
453 MRI->getRegClass(Dst) != &PPC::ACCRCRegClass) in simplifyCode()
466 if (RootPHI->getOpcode() != PPC::PHI) in simplifyCode()
478 case PPC::LI: in simplifyCode()
479 case PPC::LI8: { in simplifyCode()
494 case PPC::STW: in simplifyCode()
495 case PPC::STD: { in simplifyCode()
508 case PPC::XXPERMDI: { in simplifyCode()
543 if (DefOpc != PPC::XVCVDPSXDS && DefOpc != PPC::XVCVDPUXDS) in simplifyCode()
549 if (LoadMI && LoadMI->getOpcode() == PPC::LXVDSX) in simplifyCode()
555 (DefOpc == PPC::LXVDSX || isConversionOfLoadAndSplat())) { in simplifyCode()
559 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
568 if (DefOpc == PPC::XXPERMDI) { in simplifyCode()
589 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
613 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
620 DefOpc == PPC::XXPERMDIs && in simplifyCode()
629 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
642 case PPC::VSPLTB: in simplifyCode()
643 case PPC::VSPLTH: in simplifyCode()
644 case PPC::XXSPLTW: { in simplifyCode()
646 unsigned OpNo = MyOpcode == PPC::XXSPLTW ? 1 : 2; in simplifyCode()
656 if (DefOpcode != PPC::XVCVSPSXWS && DefOpcode != PPC::XVCVSPUXWS) in simplifyCode()
662 return Splt && (Splt->getOpcode() == PPC::LXVWSX || in simplifyCode()
663 Splt->getOpcode() == PPC::XXSPLTW); in simplifyCode()
666 (MyOpcode == PPC::VSPLTB && DefOpcode == PPC::VSPLTBs) || in simplifyCode()
667 (MyOpcode == PPC::VSPLTH && DefOpcode == PPC::VSPLTHs) || in simplifyCode()
668 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::XXSPLTWs) || in simplifyCode()
669 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::LXVWSX) || in simplifyCode()
670 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::MTVSRWS)|| in simplifyCode()
671 (MyOpcode == PPC::XXSPLTW && isConvertOfSplat()); in simplifyCode()
677 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
685 if (DefOpcode == PPC::XXSLDWI) { in simplifyCode()
691 MI.getOperand(MyOpcode == PPC::XXSPLTW ? 2 : 1).getImm(); in simplifyCode()
709 case PPC::XVCVDPSP: { in simplifyCode()
719 if (DefMI && DefMI->getOpcode() == PPC::XXPERMDI) { in simplifyCode()
738 if ((Opc == PPC::FRSP || Opc == PPC::XSRSP) && in simplifyCode()
770 case PPC::EXTSH: in simplifyCode()
771 case PPC::EXTSH8: in simplifyCode()
772 case PPC::EXTSH8_32_64: { in simplifyCode()
781 if (SrcMI->getOpcode() == PPC::LHZ || in simplifyCode()
782 SrcMI->getOpcode() == PPC::LHZX) { in simplifyCode()
786 return Opcode == PPC::EXTSH8; in simplifyCode()
789 return Opcode == PPC::LHZX; in simplifyCode()
793 if (isXForm) return PPC::LHAX8; in simplifyCode()
794 else return PPC::LHA8; in simplifyCode()
796 if (isXForm) return PPC::LHAX; in simplifyCode()
797 else return PPC::LHA; in simplifyCode()
814 case PPC::EXTSW: in simplifyCode()
815 case PPC::EXTSW_32: in simplifyCode()
816 case PPC::EXTSW_32_64: { in simplifyCode()
825 if (SrcMI->getOpcode() == PPC::LWZ || in simplifyCode()
826 SrcMI->getOpcode() == PPC::LWZX) { in simplifyCode()
830 return Opcode == PPC::EXTSW || Opcode == PPC::EXTSW_32_64; in simplifyCode()
833 return Opcode == PPC::LWZX; in simplifyCode()
837 if (isXForm) return PPC::LWAX; in simplifyCode()
838 else return PPC::LWA; in simplifyCode()
840 if (isXForm) return PPC::LWAX_32; in simplifyCode()
841 else return PPC::LWA_32; in simplifyCode()
855 } else if (MI.getOpcode() == PPC::EXTSW_32_64 && in simplifyCode()
861 MF->getRegInfo().createVirtualRegister(&PPC::G8RCRegClass); in simplifyCode()
862 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::IMPLICIT_DEF), in simplifyCode()
864 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::INSERT_SUBREG), in simplifyCode()
868 .addImm(PPC::sub_32); in simplifyCode()
875 case PPC::RLDICL: { in simplifyCode()
892 if (!(SrcMI && SrcMI->getOpcode() == PPC::INSERT_SUBREG && in simplifyCode()
899 if (ImpDefMI->getOpcode() != PPC::IMPLICIT_DEF) break; in simplifyCode()
902 if (SubRegMI->getOpcode() == PPC::COPY) { in simplifyCode()
911 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
925 case PPC::ADD4: in simplifyCode()
926 case PPC::ADD8: { in simplifyCode()
931 return DefPhiMI && (DefPhiMI->getOpcode() == PPC::PHI) && in simplifyCode()
948 (LiMI->getOpcode() != PPC::LI && LiMI->getOpcode() != PPC::LI8) in simplifyCode()
967 const TargetRegisterClass *TRC = MI.getOpcode() == PPC::ADD8 in simplifyCode()
968 ? &PPC::G8RC_and_G8RC_NOX0RegClass in simplifyCode()
969 : &PPC::GPRC_and_GPRC_NOR0RegClass; in simplifyCode()
982 if (LiMI->getOpcode() == PPC::ADDI || LiMI->getOpcode() == PPC::ADDI8) in simplifyCode()
985 assert((LiMI->getOpcode() == PPC::LI || in simplifyCode()
986 LiMI->getOpcode() == PPC::LI8) && in simplifyCode()
990 LiMI->setDesc(TII->get(LiMI->getOpcode() == PPC::LI ? PPC::ADDI in simplifyCode()
991 : PPC::ADDI8)); in simplifyCode()
1001 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
1009 case PPC::RLDICR: { in simplifyCode()
1014 case PPC::RLWINM: in simplifyCode()
1015 case PPC::RLWINM_rec: in simplifyCode()
1016 case PPC::RLWINM8: in simplifyCode()
1017 case PPC::RLWINM8_rec: { in simplifyCode()
1025 case PPC::TDI: in simplifyCode()
1026 case PPC::TWI: in simplifyCode()
1027 case PPC::TD: in simplifyCode()
1028 case PPC::TW: { in simplifyCode()
1035 if (!(LiMI1 && (LiMI1->getOpcode() == PPC::LI || in simplifyCode()
1036 LiMI1->getOpcode() == PPC::LI8))) in simplifyCode()
1039 !(LiMI2 && (LiMI2->getOpcode() == PPC::LI || in simplifyCode()
1040 LiMI2->getOpcode() == PPC::LI8))) in simplifyCode()
1060 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::TRAP)); in simplifyCode()
1096 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in isEqOrNe()
1097 unsigned PredCond = PPC::getPredicateCondition(Pred); in isEqOrNe()
1098 return (PredCond == PPC::PRED_EQ || PredCond == PPC::PRED_NE); in isEqOrNe()
1102 return (opCode == PPC::CMPLD || opCode == PPC::CMPD || in isSupportedCmpOp()
1103 opCode == PPC::CMPLW || opCode == PPC::CMPW || in isSupportedCmpOp()
1104 opCode == PPC::CMPLDI || opCode == PPC::CMPDI || in isSupportedCmpOp()
1105 opCode == PPC::CMPLWI || opCode == PPC::CMPWI); in isSupportedCmpOp()
1109 return (opCode == PPC::CMPLD || opCode == PPC::CMPD || in is64bitCmpOp()
1110 opCode == PPC::CMPLDI || opCode == PPC::CMPDI); in is64bitCmpOp()
1114 return (opCode == PPC::CMPD || opCode == PPC::CMPW || in isSignedCmpOp()
1115 opCode == PPC::CMPDI || opCode == PPC::CMPWI); in isSignedCmpOp()
1119 if (opCode == PPC::CMPLD) return PPC::CMPD; in getSignedCmpOpCode()
1120 if (opCode == PPC::CMPLW) return PPC::CMPW; in getSignedCmpOpCode()
1121 if (opCode == PPC::CMPLDI) return PPC::CMPDI; in getSignedCmpOpCode()
1122 if (opCode == PPC::CMPLWI) return PPC::CMPWI; in getSignedCmpOpCode()
1134 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in getPredicateToDecImm()
1135 unsigned PredCond = PPC::getPredicateCondition(Pred); in getPredicateToDecImm()
1136 unsigned PredHint = PPC::getPredicateHint(Pred); in getPredicateToDecImm()
1137 if (PredCond == PPC::PRED_GE) in getPredicateToDecImm()
1138 return PPC::getPredicate(PPC::PRED_GT, PredHint); in getPredicateToDecImm()
1139 if (PredCond == PPC::PRED_LT) in getPredicateToDecImm()
1140 return PPC::getPredicate(PPC::PRED_LE, PredHint); in getPredicateToDecImm()
1153 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in getPredicateToIncImm()
1154 unsigned PredCond = PPC::getPredicateCondition(Pred); in getPredicateToIncImm()
1155 unsigned PredHint = PPC::getPredicateHint(Pred); in getPredicateToIncImm()
1156 if (PredCond == PPC::PRED_GT) in getPredicateToIncImm()
1157 return PPC::getPredicate(PPC::PRED_GE, PredHint); in getPredicateToIncImm()
1158 if (PredCond == PPC::PRED_LE) in getPredicateToIncImm()
1159 return PPC::getPredicate(PPC::PRED_LT, PredHint); in getPredicateToIncImm()
1185 if (BB1 && Inst->getOpcode() == PPC::PHI && Inst->getParent() == BB2) { in getSrcVReg()
1211 (*BII).getOpcode() == PPC::BCC && in eligibleForCompareElimination()
1280 if (Inst->getParent() == &MBB && Inst->getOpcode() != PPC::PHI) in eligibleForCompareElimination()
1436 PPC::Predicate Pred = (PPC::Predicate)BI2->getOperand(0).getImm(); in eliminateRedundantCompare()
1437 NewPredicate2 = (unsigned)PPC::getSwappedPredicate(Pred); in eliminateRedundantCompare()
1549 assert(Inst->getOpcode() == PPC::PHI && in eliminateRedundantCompare()
1559 Register NewVReg = MRI->createVirtualRegister(&PPC::CRRCRegClass); in eliminateRedundantCompare()
1561 TII->get(PPC::PHI), NewVReg) in eliminateRedundantCompare()
1595 if (MI.getOpcode() != PPC::RLDICR) in emitRLDICWhenLoweringJumpTables()
1603 if (SrcMI->getOpcode() != PPC::RLDICL) in emitRLDICWhenLoweringJumpTables()
1636 MI.setDesc(TII->get(PPC::RLDIC)); in emitRLDICWhenLoweringJumpTables()
1668 if (MI.getOpcode() != PPC::RLDICR) in combineSEXTAndSHL()
1691 if (SrcMI->getOpcode() != PPC::EXTSW && in combineSEXTAndSHL()
1692 SrcMI->getOpcode() != PPC::EXTSW_32_64) in combineSEXTAndSHL()
1712 SrcMI->getOpcode() == PPC::EXTSW ? TII->get(PPC::EXTSWSLI) in combineSEXTAndSHL()
1713 : TII->get(PPC::EXTSWSLI_32_64), in combineSEXTAndSHL()