Lines Matching refs:GPReg

48     : MCTargetStreamer(S), GPReg(Mips::GP), ModuleDirectiveAllowed(true) {  in MipsTargetStreamer()
135 GPReg = RegNo; in emitDirectiveCpLocal()
310 emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI); in emitGPRestore()
1151 emitAddu(RegNo, RegNo, GPReg, getABI().IsN64(), &STI); in emitDirectiveCpAdd()
1179 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1191 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1192 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1204 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1205 TmpInst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpLoad()
1233 emitStoreWithImmOffset(Mips::SW, GPReg, Mips::SP, Offset, GetATReg, IDLoc, in emitDirectiveCpRestore()
1254 emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI); in emitDirectiveCpsetup()
1257 emitRRI(Mips::SD, GPReg, Mips::SP, RegOrOffset, SMLoc(), &STI); in emitDirectiveCpsetup()
1270 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI); in emitDirectiveCpsetup()
1273 emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(), in emitDirectiveCpsetup()
1287 emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI); in emitDirectiveCpsetup()
1290 emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(), in emitDirectiveCpsetup()
1294 emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI); in emitDirectiveCpsetup()
1307 Inst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpreturn()
1312 Inst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpreturn()