191     SmallVector<MachineInstr *, 4> Insts;  member in __anon59c8a0920111::VPTState
242       SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();  in getDivergent()  local
243       for (unsigned i = 1; i < Insts.size(); ++i) {  in getDivergent()
244         MachineInstr *Next = Insts[i];  in getDivergent()
262       SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();  in isEntryPredicatedOnVCTP()  local
263       return isPredicatedOnVCTP(Insts.front(), Exclusive);  in isEntryPredicatedOnVCTP()
271       SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();  in hasImplicitlyValidVPT()  local
272       MachineInstr *VPT = Insts.front();  in hasImplicitlyValidVPT()
316         SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();  in isValid()  local
319         assert(isVPTOpcode(Insts.front()->getOpcode()) &&  in isValid()
321         if (Insts.size() == 2 && Insts.front()->getOpcode() != ARM::MVE_VPST &&  in isValid()
322             isVCTP(Insts.back()))  in isValid()
325         for (auto *MI : Insts) {  in isValid()
344     VPTState(MachineInstr *MI) { Insts.push_back(MI); }  in VPTState()
347       Insts.push_back(MI);  in insert()
349       assert(Insts.size() <= 5 && "Too many instructions in VPT block!");  in insert()
353       return llvm::any_of(Insts, isVCTP);  in containsVCTP()
356     unsigned size() const { return Insts.size(); }  in size()
357     SmallVectorImpl<MachineInstr *> &getInsts() { return Insts; }  in getInsts()
1590     SmallVectorImpl<MachineInstr *> &Insts = Block.getInsts();  in ConvertVPTBlocks()  local
1612       MachineInstr *VPST = Insts.front();  in ConvertVPTBlocks()
1619         for (unsigned i = 1; i < Insts.size(); ++i)  in ConvertVPTBlocks()
1620           RemovePredicate(Insts[i]);  in ConvertVPTBlocks()
1673       MachineInstr *VPST = Insts.front();  in ConvertVPTBlocks()
1680     } else if (Insts.front()->getOpcode() == ARM::MVE_VPST) {  in ConvertVPTBlocks()
1684       MachineInstr *VPST = Insts.front();  in ConvertVPTBlocks()